PIC18F8720-I/PT Microchip Technology, PIC18F8720-I/PT Datasheet - Page 9

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PIC18F8720-I/PT

Manufacturer Part Number
PIC18F8720-I/PT
Description
IC MCU FLASH 64KX16 EE 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F8720-I/PT

Program Memory Type
FLASH
Program Memory Size
128KB (64K x 16)
Package / Case
80-TFQFP
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
68
Eeprom Size
1K x 8
Ram Size
3.75K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.75 KB
Interface Type
I2C/SPI/USART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
68
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM183032, DM183022, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Package
80TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
25 MHz
Operating Supply Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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TABLE 3-2:
FIGURE 3-4:
 2010 Microchip Technology Inc.
Step 1: Direct access to config memory.
Step 2: Configure device for multi-panel writes.
Step 3: Direct access to code memory and enable erase.
Step 4: Erase single row of all panels at an offset.
Step 5: Repeat step 4, with Address Pointer incremented by 64 until all panels are erased.
Command
0000
0000
0000
0000
0000
0000
0000
0000
0000
1100
0000
0000
0000
0000
0000
0000
1111
0000
4-Bit
Addr = Addr + 64
8E A6
8C A6
86 A6
0E 3C
6E F8
0E 00
6E F7
0E 06
6E F6
00 40
8E A6
9C A6
88 A6
6A F8
6A F7
6A F6
<DummyLSB>
<DummyMSB>
00 00
ERASE CODE MEMORY CODE SEQUENCE
Data Payload
MULTI-PANEL SINGLE ROW ERASE CODE MEMORY FLOW
BSF
BSF
BSF
MOVLW 3Ch
MOVWF TBLPTRU
MOVLW 00h
MOVWF TBLPTRH
MOVLW 06h
MOVWF TBLPTRL
Write 40h to 3C0006h to enable multi-panel erase.
BSF
BCF
BSF
CLRF
CLRF
CLRF
Write 2 dummy bytes and start programming.
NOP - hold SCLK high for time P9.
EECON1, EEPGD
EECON1, CFGS
EECON1, WREN
EECON1, EEPGD
EECON1, CFGS
EECON1, FREE
TBLPTRU
TBLPTRH
TBLPTRL
No
Start Erase Sequence
and hold SCLK High
Multi-Panel Erase
Delay P9 + P10
Time for Erase
Until Done
Device for
Configure
to occur
Panels
Done?
Start
Done
All
Yes
Addr = 0
Core Instruction
PIC18FXX20
DS39583C-page 9

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