DSPIC30F6010-30I/PF Microchip Technology, DSPIC30F6010-30I/PF Datasheet - Page 16

• Manufacturer Part Number: DSPIC30F6010-30I/PF
• Description: IC DSPIC MCU/DSP 144K 80TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6010-30I/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 144KB (48K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 68
• Flash Memory Size: 144KB
• Supply Voltage Range: 2.5V To 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300019 - BOARD DEMO DSPICDEM 80L STARTERAC164314 - MODULE SKT FOR PM3 80PFDM300020 - BOARD DEV DSPICDEM MC1 MOTORCTRLAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F601030IPF

dsPIC30F6010
24. Module: PLL
25. Module: Interrupt Controller
DS80459D-page 16
When the 4x PLL mode of operation is selected, the
specified input frequency range of 4 MHz-10 MHz is
not fully supported.
When device V
frequency must be in the range of 4 MHz-5 MHz.
When device V
frequency must be in the range of 4 MHz-6 MHz
for both industrial and extended temperature
ranges.
Work around
1. Use 8x PLL or 16x PLL mode of operation and
2. Use the EC without PLL Clock mode with a
Affected Silicon Revisions
The following sequence of events will lead to an
address
“Interrupt 1” is used to represent any enabled
dsPIC30F interrupt.
1. User software performs one of the following
2. Interrupt 1 occurs between 2 and 4 instruction
Work arounds
Work around 1: For Assembly Language
Source Code
The user may disable interrupt nesting, disable
interrupts before modifying the Interrupt 1 set-
ting or execute a DISI instruction before modi-
fying the CPU IPL or Interrupt 1. A minimum
DISI value of 4 is required if the DISI instruction
is executed immediately before the CPU IPL or
Interrupt 1 is modified, as shown in Example 11.
It is necessary to have DISI active for four cycles
after the CPU IPL or Interrupt 1 is modified.
B1
X
set final device clock speed using the
POST<1:0> oscillator postscaler control bits
(OSCCON<7:6>).
suitable
equivalent 4x PLL clock rate.
operations:
-
-
-
-
cycles after any of the operations listed above.
CPU IPL is raised to Interrupt 1 IPL
level or higher, or
Interrupt 1 IPL is lowered to CPU IPL
level or lower, or
Interrupt 1 is disabled (Interrupt 1 IE
bit set to ‘0’), or
Interrupt 1 flag is cleared
B2
X
error
clock
DD
DD
trap.
is 2.5V-3.0V, the 4x PLL input
is 3.0V-3.6V, the 4x PLL input
frequency
The
generic
to
obtain
term
the
EXAMPLE 11:
EXAMPLE 12:
.include "p30fxxxx.inc"
...
DISI #4 ; protect the disable
; of INT1
BCLR IEC1, #INT1IE ; disable interrupt 1
... ; next instruction
;protected by DISI
// Note: Macro defined in device include
// files
#define SET_CPU_IPL (ipl){ \
int DISI_save; \
\
DISI_save = DISICNT; \
asm volatile ("disi #0x3FFF");\
SRbits.IPL = ipl; \
__builtin_nop();
__builtin_nop();
DISICNT = DISI_save; } (void) 0;
#include "p30fxxxx.h"
. . .
SET_CPU_IPL (3)
. . .
Work around 2: For C Language Source Code
For applications using the C language, MPLAB
C30 versions 1.32 and higher provide several
macros for modifying the CPU IPL. The
SET_CPU_IPL macro provides the ability to
safely modify the CPU IPL, as shown in
Example 12.
There is one level of DISI, so this macro saves
and restores the DISI state. For temporarily
modifying and restoring the CPU IPL, the mac-
ros
RESTORE_CPU_IPL can be used, as shown in
Example 13. These macros also make use of
the SET_CPU_IPL macro.
SET_AND_SAVE_CPU_IPL
USING DISI
USING SET_CPU_IPL
MACRO
\
\
© 2010 Microchip Technology Inc.
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