MC908JB8ADWE Freescale Semiconductor, MC908JB8ADWE Datasheet - Page 148

• Manufacturer Part Number: MC908JB8ADWE
• Description: IC MCU 3MHZ 8K FLASH 28-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908JB8ADWE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: USB
• Peripherals: LVD, POR, PWM
• Number Of I /o: 21
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: HC08JB
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: USB
• Maximum Clock Frequency: 3 MHz
• Number Of Programmable I/os: 37
• Number Of Timers: 2
• Operating Supply Voltage: 5.25 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
• Minimum Operating Temperature: 0 C
• Controller Family/series: HC08
• No. Of I/o's: 21
• Ram Memory Size: 256Byte
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Universal Serial Bus Module (USB)
Technical Data
148
STALL2 — Endpoint 2 Force Stall Bit
TX2E — Endpoint 2 Transmit Enable
RX2E — Endpoint 2 Receive Enable
TP2SIZ3–TP2SIZ0 — Endpoint 2 Transmit Data Packet Size
This read/write bit causes endpoint 2 to return a STALL handshake
when polled by either an IN or OUT token by the USB host controller.
Reset clears this bit.
This read/write bit enables a transmit to occur when the USB host
controller sends an IN token to endpoint 2. The appropriate endpoint
enable bit, ENABLE2 bit in the UCR3 register, also should be set.
Software should set the TX2E bit when data is ready to be
transmitted. It must be cleared by software when no more data needs
to be transmitted.
If this bit is 0 or the TXD2F is set, the USB will respond with a NAK
handshake to any endpoint 2 directed IN tokens. Reset clears this bit.
This read/write bit enables a receive to occur when the USB host
controller sends an OUT token to endpoint 2. Software should set this
bit when data is ready to be received. It must be cleared by software
when data cannot be received.
If this bit is 0 or the RXD2F is set, the USB will respond with a NAK
handshake to any endpoint 2 OUT tokens. Reset clears this bit.
These read/write bits store the number of transmit data bytes for the
next IN token request for endpoint 2. These bits are cleared by reset.
1 = Send STALL handshake
0 = Default
1 = Data is ready to be sent
0 = Data is not ready. Respond with NAK
1 = Data is ready to be received
0 = Not ready for data. Respond with NAK
Universal Serial Bus Module (USB)
MC68HC908JB8•MC68HC08JB8•MC68HC08JT8 — Rev. 2.3
Freescale Semiconductor