C8051F818-GM Silicon Laboratories Inc, C8051F818-GM Datasheet - Page 146

• Manufacturer Part Number: C8051F818-GM
• Description: IC MCU 8BIT 8KB FLASH 20QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F81xr

Specifications of C8051F818-GM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Cap Sense, POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-QFN
• Processor Series: C8051F8x
• Core: 8051
• Data Bus Width: 16 bit
• Data Ram Size: 512 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F800DK
• Minimum Operating Temperature: - 55 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 336-1798-5

C8051F80x-83x
146
Figure 23.6. Priority Crossbar Decoder Example 2—Skipping Pins
In this example, the crossbar is configured to assign the UART TX0 and
RX0 signals, the SPI signals, and the PCA signals. Note that the SPI
signals are assigned as multiple signals. Additionally, pins P0.0, P0.2, and
P0.3 are configured to be skipped using the P0SKIP register.
in this configuration.
1
2
3
P1.0, respectively.
4
respectively.
All unassigned pins, including those skipped by XBR0 can be used as
GPIO or for other non-crossbar functions.
Notes:
1. P1.4-P1.7 are not available on 16-pin packages.
2. NSS is only pinned out when the SPI is in 4-wire mode.
Pin Number
st
nd
rd
th
TX0 is assigned to P0.4
SCK, MISO, MOSI, and NSS are assigned to P0.1, P0.6, P0.7, and
CEX0, CEX1, and CEX2 are assigned to P1.1, P1.2, and P1.3,
RX0 is assigned to P0.5
These boxes represent the port pins which are used by the peripherals
SYSCLK
Function
Pin Skip
Settings
Special
Signals
CP0A
CEX0
CEX1
CEX2
MISO
MOSI
NSS
SCK
SDA
RX0
SCL
CP0
Port
TX0
ECI
T0
T1
2
0
1
1
0
2
1
P0SKIP
3
1
P0
4
0
5
0
Rev. 1.0
6
0
7
0
0
0
1
0
2
0
P1SKIP
3
0
P1
4
0
1
5
0
1
6
0
1
7
0
1
0