MC908JL3ECDWE Freescale Semiconductor, MC908JL3ECDWE Datasheet - Page 63

• Manufacturer Part Number: MC908JL3ECDWE
• Description: IC MCU 4K FLASH 8MHZ 28-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908JL3ECDWE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 23
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.3 V
• Data Converters: A/D 12x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: HC08JL
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 26
• Number Of Timers: 2
• Operating Supply Voltage: 3 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908JL16E, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

5.7 SIM Registers
The SIM has three memory mapped registers.
5.7.1 Break Status Register (BSR)
The break status register contains a flag to indicate a break caused by an exit from wait mode.
SBSW — SIM Break Stop/Wait
Freescale Semiconductor
SBSW can be read within the break state SWI routine. The user can modify the return address on the
stack by subtracting one from it.
INT/BREAK
2OSCOUT
1 = Wait mode was exited by break interrupt
0 = Wait mode was not exited by break interrupt
IAB
Address:
Reset:
Read:
Write:
Address
$FE00
$FE01
$FE03
Figure 5-19. Stop Mode Recovery from Interrupt or Break
$FE00
Bit 7
R
R
Figure 5-20. Break Status Register (BSR)
STOP +1
= Reserved
MC68HC908JL3E Family Data Sheet, Rev. 4
R
6
Table 5-4. SIM Registers
Register
R
5
BFCR
BSR
RSR
STOP + 2
Table 5-4
STOP RECOVERY PERIOD
R
4
STOP + 2
shows the mapping of these registers.
1. Writing a zero clears SBSW.
R
3
SP
Access Mode
R
2
User
User
User
SP – 1
Note
SBSW
1
0
(1)
SP – 2
Bit 0
R
SIM Registers
SP – 3
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