C8051F507-IM Silicon Laboratories Inc, C8051F507-IM Datasheet - Page 311
C8051F507-IM
Manufacturer Part Number
C8051F507-IM
Description
IC 8051 MCU 32K FLASH 32-QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F50xr
Specifications of C8051F507-IM
Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
32-QFN
Mfg Application Notes
LIN Bootloader AppNote
Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
25
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.25 V
Data Converters
A/D 25x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
C8051F5x
Core
8051
Data Bus Width
8 bit
Data Ram Size
4.25 KB
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F500DK
Minimum Operating Temperature
- 40 C
On-chip Adc
32-ch x 12-bit
A/d Bit Size
12 bit
A/d Channels Available
32
Height
0.83 mm
Length
5 mm
Supply Voltage (max)
5.25 V
Supply Voltage (min)
1.8 V
Width
5 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1527 - KIT DEV FOR C8051F50X
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1525-5
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Revision 1.1 to Revision 1.2
Updated “1. System Overview” with a voltage range specification for the internal oscillator.
Updated Table 5.6 on page 47 with new conditions for the internal oscillator accuracy. The internal
oscillator accuracy is dependent on the operating voltage range.
Updated “5. Electrical Characteristics” to remove the internal oscillator curve across temperature
diagram.
Updated SFR Definition 10.1 (REG0CN) with a new definition for Bit 6. The bit 6 reset value is 1b and
must be written to 1b.
Updated “21. Local Interconnect Network (LIN)” with a voltage range specification for the internal
oscillator.
Updated “22. Controller Area Network (CAN0)” with a voltage range specification for the internal
oscillator.
Updated SFR Definition 8.1 (REF0CN) with oscillator suspend requirement for ZTCEN.
Updated "16.3 Suspend Mode" with note regarding ZTCEN.
Updated Figure 6.4 with new timing diagram when using CNVSTR pin.
Added Port 2 Event and Port 3 Events to wake-up sources in Section 19.2.1.
Updated LIN Register Definitions 21.9 and 21.10 with correct reset values.
Updated C2 Register Definitions 28.2 and 28.3 with correct C2 and SFR addresses.
Rev. 1.2
C8051F50x/F51x
311
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