C8051F503-IM Silicon Laboratories Inc, C8051F503-IM Datasheet - Page 208
C8051F503-IM
Manufacturer Part Number
C8051F503-IM
Description
IC 8051 MCU 64K FLASH 32-QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F50xr
Datasheets
1.C8051F507-IM.pdf
(312 pages)
2.C8051F503-IM.pdf
(1 pages)
3.C8051F503-IM.pdf
(312 pages)
Specifications of C8051F503-IM
Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
32-QFN
Mfg Application Notes
LIN Bootloader AppNote
Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
25
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.25 V
Data Converters
A/D 25x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
C8051F5x
Core
8051
Data Bus Width
8 bit
Data Ram Size
4.25 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
25
Number Of Timers
4
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F500DK
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 32 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1527 - KIT DEV FOR C8051F50X
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1517-5
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C8051F50x/F51x
21.7. LIN Registers
The following Special Function Registers (SFRs) and indirect registers are available for the LIN controller.
21.7.1. LIN Direct Access SFR Registers Definitions
SFR Definition 21.1. LIN0ADR: LIN0 Indirect Address Register
SFR Address = 0xD3; SFR Page = 0x00
SFR Definition 21.2. LIN0DAT: LIN0 Indirect Data Register
SFR Address = 0xD2; SFR Page = 0x00
208
Name
Reset
Name
Reset
7:0 LIN0ADR[7:0] LIN Indirect Address Register Bits.
7:0 LIN0DAT[7:0] LIN Indirect Data Register Bits.
Bit
Bit
Type
Type
Bit
Bit
Name
Name
7
0
7
0
This register hold an 8-bit address used to indirectly access the LIN0 core registers.
Table 21.4 lists the LIN0 core registers and their indirect addresses. Reads and
writes to LIN0DAT will target the register indicated by the LIN0ADR bits.
When this register is read, it will read the contents of the LIN0 core register pointed
to by LIN0ADR.
When this register is written, it will write the value to the LIN0 core register pointed
to by LIN0ADR.
6
0
6
0
5
0
5
0
Rev. 1.2
LIN0ADR[7:0]
4
0
4
LIN0DAT[7:0]
0
R/W
R/W
Function
Function
3
0
3
0
2
0
2
0
1
0
1
0
0
0
0
0
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