R5F21134DFP#U0 Renesas Electronics America, R5F21134DFP#U0 Datasheet - Page 32
R5F21134DFP#U0
Manufacturer Part Number
R5F21134DFP#U0
Description
IC R8C MCU FLASH 32LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/R8C/Tiny/13r
Datasheets
1.R5F211A2SPU0.pdf
(300 pages)
2.R5F21132FPU0.pdf
(33 pages)
3.R5F21132FPU0.pdf
(226 pages)
4.R5F21134DFPU0.pdf
(224 pages)
Specifications of R5F21134DFP#U0
Core Size
16-Bit
Program Memory Size
16KB (16K x 8)
Oscillator Type
Internal
Core Processor
R8C
Speed
20MHz
Connectivity
SIO, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
No. Of I/o's
22
Eeprom Memory Size
4KB
Ram Memory Size
1024Byte
Cpu Speed
20MHz
No. Of Timers
16
Digital Ic Case
RoHS Compliant
Controller Family/series
R8C/13
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K521134S000BE - KIT EVAL STARTER FOR R8C/13R0E521134EPB00 - KIT EMULATOR PROBE FOR PC7501R0E521134CPE00 - EMULATOR COMPACT R8C/13
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F21134DFP#U0R5F21134DFP
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- R5F211A2SPU0 PDF datasheet
- R5F21132FPU0 PDF datasheet #2
- R5F21132FPU0 PDF datasheet #3
- R5F21134DFPU0 PDF datasheet #4
- Current page: 32 of 300
- Download datasheet (2Mb)
Rev.2.00 Oct 17, 2005
REJ09B0001-0200
Chapter 1 Overview
Figure 1.7.3 Register Bit Specification
Figure 1.7.4 Addressing Modes Used for Memory Bit Specification
Table 1.7.1 Bit Specification Address Range
1.7.3 Bits
bit,base:16
bit,base:8[SB]
bit,base:11[SB]
bit,base:16[SB]
bit,base:8[FB]
[An]
base:8[An]
base:16[An]
Addressing
Figure 1.7.3 shows register bit specification.
Register bits can be specified by register directly (bit, Rn or bit, An). Use bit, Rn to specify a bit in a
data register (Rn); use bit, An to specify a bit in an address register (An).
The bits in each register are assigned bit numbers from 0 to 15, from LSB to MSB. Therefore, bit, Rn
and bit, An can be used to specify a bit number from 0 to 15.
Figure 1.7.4 shows the addressing modes used for memory bit specification. Table 1.7.1 lists the ad-
dress range in which bits can be specified in each addressing mode. Be sure to observe the address
range in Table 1.7.1 when specifying memory bits.
Register bits
Memory bits
bit,Rn
(bit: 0 to 15, n: 0 to 3)
Addressing modes
b15
page 12 of 263
Lower Limit (Address)
00000
[SB]
[SB]
[SB]
[FB]–00010
00000
base:8
base:16
16
16
Rn
Specification range
16
Absolute addressing
SB-based relative
addressing
FB-based relative
addressing
Address register-based indirect
addressing
Address register-based relative
addressing
Upper Limit (Address)
01FFF
[SB]+0001F
[SB]+000FF
[SB]+01FFF
[FB]+0000F
01FFF
base:8+01FFF
base:16+01FFF
b0
16
16
16
16
16
16
bit,An
(bit: 0 to 15, n: 0 to 1)
16
16
The access range is 00000
The access range is 00000
The access range is 00000
The access range is 00000
The access range is 00000
The access range is 00000
b15
bit,base:8
bit,base:16
bit,base:8[SB]
bit,base:8[FB]
base:16[An]
bit,base:11[SB]
bit,base:16[SB]
[An]
base:8[An]
bit,base:16
An
Remarks
1.7 Data Types
16
16
16
16
16
16
to 0FFFF
to 0FFFF
to 0FFFF
to 0FFFF
to 020FE
to 0FFFF
b0
16
16
16
16
16
16
.
.
.
.
.
.
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