R5F21276SNFP#U0 Renesas Electronics America, R5F21276SNFP#U0 Datasheet - Page 447

IC R8C/27 MCU FLASH 32LQFP

R5F21276SNFP#U0

Manufacturer Part Number
R5F21276SNFP#U0
Description
IC R8C/27 MCU FLASH 32LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/27r
Datasheets

Specifications of R5F21276SNFP#U0

Core Size
16/32-Bit
Program Memory Size
32KB (32K x 8)
Core Processor
R8C
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
LED, POR, Voltage Detect, WDT
Number Of I /o
25
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
32-LQFP
No. Of I/o's
25
Ram Memory Size
1.5KB
Cpu Speed
20MHz
No. Of Timers
4
Digital Ic Case Style
LQFP
Supply Voltage Range
2.2V To 5.5V
Embedded Interface Type
I2C, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
R0K521276S000BE - KIT DEV RSK-R8C/26-29R0E521000EPB00 - PROBE EMULATOR FOR PC7501
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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R8C/26 Group, R8C/27 Group
Rev.2.10
REJ09B0278-0210
21.2
21.2.1
21.2.2
21.2.3
Do not read address 00000h by a program. When a maskable interrupt request is acknowledged, the CPU reads
interrupt information (interrupt number and interrupt request level) from 00000h in the interrupt sequence. At
this time, the acknowledged interrupt IR bit is set to 0.
If address 00000h is read by a program, the IR bit for the interrupt which has the highest priority among the
enabled interrupts is set to 0. This may cause the interrupt to be canceled, or an unexpected interrupt to be
generated.
Set any value in the SP before an interrupt is acknowledged. The SP is set to 0000h after reset. Therefore, if an
interrupt is acknowledged before setting a value in the SP, the program may run out of control.
Either “L” level or an “H” level of width shown in the Electrical Characteristics is necessary for the signal input
to pins INT0, INT1, INT3 and pins KI0 to KI3, regardless of the CPU clock.
For details, refer to Table 20.21 (VCC = 5V), Table 20.27 (VCC = 3V), Table 20.33 (VCC = 2.2V), Table
20.52 (VCC = 5V), Table 20.58 (VCC = 3V) External Interrupt INTi (i = 0, 1, 3) Input.
Notes on Interrupts
Sep 26, 2008
Reading Address 00000h
SP Setting
External Interrupt and Key Input Interrupt
Page 428 of 453
21. Usage Notes

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