MC9S08DZ60ACLF Freescale Semiconductor, MC9S08DZ60ACLF Datasheet - Page 266
![IC MCU 60K FLASH 4K RAM 48-LQFP](/photos/12/18/121825/mc9s08dz60aclf_sml.jpg)
MC9S08DZ60ACLF
Manufacturer Part Number
MC9S08DZ60ACLF
Description
IC MCU 60K FLASH 4K RAM 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets
1.DEMO9S08DZ60.pdf
(416 pages)
2.EVB9S08DZ60.pdf
(4 pages)
3.MC9S08DZ48AMLF.pdf
(458 pages)
Specifications of MC9S08DZ60ACLF
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Processor Series
S08DZ
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
CAN, I2C, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
53
Number Of Timers
2
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08DZ60
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 24 Channel
For Use With
DEMO9S08DZ60 - BOARD DEMOEVB9S08DZ60 - BOARD EVAL FOR 9S08DZ60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S08DZ60ACLF
Manufacturer:
FREESCAL
Quantity:
1 250
Company:
Part Number:
MC9S08DZ60ACLF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Chapter 12 Freescale’s Controller Area Network (S08MSCANV1)
The MSCAN is able to leave sleep mode (wake up) only when:
After wake-up, the MSCAN waits for 11 consecutive recessive bits to synchronize to the CAN bus. As a
consequence, if the MSCAN is woken-up by a CAN frame, this frame is not received.
The receive message buffers (RxFG and RxBG) contain messages if they were received before sleep mode
was entered. All pending actions will be executed upon wake-up; copying of RxBG into RxFG, message
aborts and message transmissions. If the MSCAN remains in bus-off state after sleep mode was exited, it
continues counting the 128 occurrences of 11 consecutive recessive bits.
266
•
•
CAN bus activity occurs and WUPE = 1
or
the CPU clears the SLPRQ bit
The CPU cannot clear the SLPRQ bit before sleep mode (SLPRQ = 1 and
SLPAK = 1) is active.
Figure 12-45. Simplified State Transitions for Entering/Leaving Sleep Mode
StartUp
CAN Activity &
SLPRQ
CAN Activity &
SLPRQ
CAN Activity
MC9S08DZ60 Series Data Sheet, Rev. 4
CAN Activity
CAN Activity
Message
Active
for Idle
Tx/Rx
Wait
Idle
NOTE
SLPRQ
CAN Activity
(CAN Activity & WUPE) | SLPRQ
Sleep
(CAN Activity & WUPE) |
CAN Activity
Freescale Semiconductor
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