R5F21254SNFP#U0 Renesas Electronics America, R5F21254SNFP#U0 Datasheet - Page 15
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R5F21254SNFP#U0
Manufacturer Part Number
R5F21254SNFP#U0
Description
IC R8C MCU FLASH 16K 52LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/25r
Datasheets
1.R5F211A2SPU0.pdf
(300 pages)
2.R5F21246SDFPU0.pdf
(61 pages)
3.R5F21246SDFPU0.pdf
(527 pages)
Specifications of R5F21254SNFP#U0
Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, Voltage Detect, WDT
Number Of I /o
41
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
52-LQFP
For Use With
R0K521256S000BE - KIT EVAL STARTER FOR R8C/25
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
R8C/24 Group, R8C/25 Group
Rev.3.00
REJ03B0117-0300
2.
Figure 2.1 shows the CPU Registers. The CPU contains 13 registers. R0, R1, R2, R3, A0, A1, and FB configure a
register bank. There are two sets of register bank.
Figure 2.1
b31
Central Processing Unit (CPU)
Feb 29, 2008
NOTE:
1. These registers comprise a register bank. There are two register banks.
CPU Registers
R2
R3
b15
Page 13 of 51
IPL
b19
b19
INTBH
The 4 high order bits of INTB are INTBH and
the 16 low order bits of INTB are INTBL.
b15
b15
b15
b15
R0H (high-order of R0)
R1H (high-order of R1)
b8
U
b7
PC
I
INTBL
USP
FLG
ISP
FB
SB
R2
R3
A1
b8b7
A0
O
R0L (low-order of R0)
R1L (low-order of R1)
B
S
Z
D
C
b0
b0
b0
b0
b0
b0
2. Central Processing Unit (CPU)
Frame base register
Address registers
Data registers
User stack pointer
Interrupt stack pointer
Static base register
Flag register
Carry flag
Debug flag
Zero flag
Sign flag
Register bank select flag
Overflow flag
Interrupt enable flag
Stack pointer select flag
Reserved bit
Processor interrupt priority level
Reserved bit
Interrupt table register
Program counter
(1)
(1)
(1)