MC56F8122VFAE Freescale Semiconductor, MC56F8122VFAE Datasheet - Page 22

• Manufacturer Part Number: MC56F8122VFAE
• Description: IC DSP 16BIT 40MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxxr

Specifications of MC56F8122VFAE

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 21
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Ram Size: 4K x 16
• Voltage - Supply (vcc/vdd): 2.25 V ~ 3.6 V
• Data Converters: A/D 6x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 48-LQFP
• Data Bus Width: 16 bit
• Processor Series: MC56F81xx
• Core: 56800E
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 21
• Data Ram Size: 8 KB
• Operating Supply Voltage: - 0.3 V to + 4 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Data Rom Size: 8 KB
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

22
Signal Name
(SYS_CLK)
(prescaler_
(GPIOB5)
(GPIOB4)
(GPIOB3)
INDEX0
HOME0
SCLK0
clock)
(TA2)
(TA3)
Table 2-2 Signal and Package Information for the 48-Pin LQFP (Continued)
Pin No.
36
35
19
Schmitt
Schmitt
Schmitt
Schmitt
Schmitt
Schmitt
Schmitt
Schmitt
Output
Output
Output
Output
Output
Output
Output
Output
Input/
Input/
Input/
Input/
Input/
Input/
Type
Input
Input
State During
Tri-Input,
enabled
enabled
enabled
pull-up
pull-up
pull-up
Reset
Input,
Input,
56F8322 Techncial Data, Rev. 16
Index — Quadrature Decoder 0, INDEX input
TA2 — Timer A, Channel 2
Port B GPIO — This GPIO pin can be individually programmed as an
input or output pin.
Clock Output - can be used to monitor the internal SYS_CLK signal
(see
In the 56F8322, the default state after reset is INDEX0.
In the 56F8122, the default state is not one of the functions offered
and must be reconfigured.
Home — Quadrature Decoder 0, HOME input
TA3 — Timer A, Channel 3
Port B GPIO — This GPIO pin can be individually programmed as an
input or output pin.
Clock Output - can be used to monitor the internal prescaler_clock
signal (see
In the 56F8322, the default state after reset is HOME0.
In the 56F8122, the default state is not one of the functions offered
and must be reconfigured.
SPI 0 Serial Clock — In the master mode, this pin serves as an
output, clocking slaved listeners. In slave mode, this pin serves as the
data clock input. A Schmitt trigger input is used for noise immunity.
Port B GPIO — This GPIO pin can be individually programmed as an
input or output pin.
After reset, the default state is SCLK0.
Section 6.5.7
Section 6.5.7
CLKO Select Register, SIM_CLKOSR).
Signal Description
CLKO Select Register, SIM_CLKOSR).
Freescale Semiconductor
Preliminary