MC908AP32CFBE Freescale Semiconductor, MC908AP32CFBE Datasheet - Page 73

• Manufacturer Part Number: MC908AP32CFBE
• Description: IC MCU 32K FLASH 8MHZ 44QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AP32CFBE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, IRSCI, SCI, SPI
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-QFP
• Controller Family/series: HC08
• No. Of I/o's: 32
• Ram Memory Size: 2KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08AP
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908AP64E, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

5.2.2 TBM Reference Clock Selection
The timebase module reference clock (OSCCLK) is selected by configuring two bits in the CONFIG2
register, at $001D. See
Freescale Semiconductor
OSCSEL1
0
0
1
1
Address:
The internal oscillator is a free running oscillator and is available after each
POR or reset. It is turned-off in stop mode by setting the STOP_ICLKDIS
bit in CONFIG2.
The RCCLK or XCLK is only available if that clock is selected as the CGM
reference clock, whereas the ICLK is always available.
Reset:
Read:
Write:
OSCSEL0
OSCCLK1
0
1
0
1
ICLKDIS
Table 5-2. Timebase Module Reference Clock Selection
STOP_
$001D
0
0
1
1
Bit 7
Chapter 3 Configuration & Mask Option Registers (CONFIG &
0
Figure 5-3. Configuration Register 2 (CONFIG2)
RCLKEN
STOP_
Table 5-1. CGMXCLK Clock Selection
CGMXCLK
6
0
MC68HC908AP Family Data Sheet, Rev. 4
RCCLK
XCLK
ICLK
—
XCLKEN
STOP_
OSCCLK0
5
0
0
1
0
1
OSC2 Pin
output of
Inverting
OSCCLK1 OSCCLK0
NOTE
NOTE
X-TAL
f
f
BUS
BUS
—
4
0
3
0
Not used
Internal oscillator generates the CGMXCLK.
RC oscillator generates the CGMXCLK.
Internal oscillator is available after each POR or
reset.
X-tal oscillator generates the CGMXCLK.
Internal oscillator is available after each POR or
reset.
Timebase Clock Source
Internal oscillator (ICLK)
RC oscillator (RCCLK)
X-tal oscillator (XCLK)
2
0
0
Not used
Comments
1
0
0
SCIBD-
SRC
Bit 0
MOR).
0
Clock Selection
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