MC9S12GC32VFAE Freescale Semiconductor, MC9S12GC32VFAE Datasheet - Page 316
![IC MCU 16BIT 32K FLASH 48-LQFP](/photos/12/19/121900/mc9s12gc32vfae_sml.jpg)
MC9S12GC32VFAE
Manufacturer Part Number
MC9S12GC32VFAE
Description
IC MCU 16BIT 32K FLASH 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.MC9S12GC16MFUE.pdf
(690 pages)
Specifications of MC9S12GC32VFAE
Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
31
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
48-LQFP
Processor Series
S12GC
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
2 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
31
Number Of Timers
8
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68EVB912C32EE, M68DKIT912C32SLK
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S12GC32VFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Chapter 10 Freescale’s Scalable Controller Area Network (S12MSCANV2)
Write: For transmit buffers, anytime when TXEx flag is set (see
Flag Register
Section 10.3.2.11, “MSCAN Transmit Buffer Selection Register
receive buffers.
Reset: Undefined (0x00XX) because of RAM-based implementation
10.3.3.1
The identifier registers for an extended format identifier consist of a total of 32 bits; ID[28:0], SRR, IDE,
and RTR bits. The identifier registers for a standard format identifier consist of a total of 13 bits; ID[10:0],
RTR, and IDE bits.
10.3.3.1.1
316
Module Base + 0x00X1
ID[28:21]
Register
0x00X0
0x00X1
0x00X2
0x00X3
Field
Name
IDR0
IDR1
IDR2
IDR3
7:0
Reset:
W
R
Extended Format Identifier — The identifiers consist of 29 bits (ID[28:0]) for the extended format. ID28 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number.
Identifier Registers (IDR0–IDR3)
Figure 10-24. Receive/Transmit Message Buffer — Standard Identifier Mapping
(CANTFLG)”) and the corresponding transmit buffer is selected in CANTBSEL (see
W
W
W
W
R
R
R
R
IDR0–IDR3 for Extended Identifier Mapping
ID28
7
x
Figure 10-25. Identifier Register 0 (IDR0) — Extended Identifier Mapping
Bit 7
ID10
ID2
Table 10-24. IDR0 Register Field Descriptions — Extended
ID27
= Unused, always read ‘x’
6
x
ID9
ID1
6
MC9S12C-Family / MC9S12GC-Family
ID26
5
x
ID8
ID0
5
Rev 01.24
ID25
4
x
Description
RTR
ID7
4
ID24
IDE (=0)
x
3
Section 10.3.2.7, “MSCAN Transmitter
(CANTBSEL)”). Unimplemented for
ID6
3
ID23
2
x
ID5
2
Freescale Semiconductor
ID22
ID4
x
1
1
ID21
Bit 0
ID3
0
x
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