MC908AZ60ACFUER Freescale Semiconductor, MC908AZ60ACFUER Datasheet - Page 99

• Manufacturer Part Number: MC908AZ60ACFUER
• Description: IC MCU 60K FLASH 8.4MHZ 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AZ60ACFUER

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8.4MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 52
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 15x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• Processor Series: HC08AZ
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8.4 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE, ZK-HC08AX-A, M68EM08AS/AZ60AE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 15 Channel
• Controller Family/series: HC08
• No. Of I/o's: 52
• Eeprom Memory Size: 1KB
• Ram Memory Size: 2KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: MC908AZ60ACFUERTR

Chapter 8
Central Processor Unit (CPU)
8.1 Introduction
The M68HC08 CPU (central processor unit) is an enhanced and fully object-code-compatible version of
the M68HC05 CPU. The CPU08 Reference Manual (document order number CPU08RM/AD) contains a
description of the CPU instruction set, addressing modes, and architecture.
8.2 Features
Features of the CPU include:
8.3 CPU Registers
Figure 8-1
Freescale Semiconductor
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Object code fully upward-compatible with M68HC05 Family
16-bit stack pointer with stack manipulation instructions
16-bit index register with x-register manipulation instructions
8-MHz CPU internal bus frequency
64-Kbyte program/data memory space
16 addressing modes
Memory-to-memory data moves without using accumulator
Fast 8-bit by 8-bit multiply and 16-bit by 8-bit divide instructions
Enhanced binary-coded decimal (BCD) data handling
Modular architecture with expandable internal bus definition for extension of addressing range
beyond 64 Kbytes
Low-power stop and wait modes
shows the five CPU registers. CPU registers are not part of the memory map.
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
99