MC908AP64CFAE Freescale Semiconductor, MC908AP64CFAE Datasheet - Page 272
![IC MCU 64K 8MHZ SPI 48-LQFP](/photos/12/19/121958/mc908ap64cfae_sml.jpg)
MC908AP64CFAE
Manufacturer Part Number
MC908AP64CFAE
Description
IC MCU 64K 8MHZ SPI 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Specifications of MC908AP64CFAE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SCI, SPI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
32
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Cpu Family
HC08
Device Core Size
8b
Frequency (max)
8MHz
Interface Type
SCI/SPI
Total Internal Ram Size
2KB
# I/os (max)
32
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Controller Family/series
HC08
No. Of I/o's
32
Ram Memory Size
2KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08AP
Core
HC08
Data Bus Width
8 bit
Data Ram Size
2 KB
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908AP64E, M68CBL05CE
Minimum Operating Temperature
- 40 C
Package
48LQFP
Family Name
HC08
Maximum Speed
8 MHz
Operating Supply Voltage
3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
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External Interrupt (IRQ)
The IRQ1 pin has a permanent internal pullup device connected, while the IRQ2 pin has an optional
pullup device that can be enabled or disabled by the PUC0ENB bit in the INTSCR2 register.
17.5 IRQ Module During Break Interrupts
The BCFE bit in the SIM break flag control register (SBFCR) enables software to clear the latch during
the break state. (See
To allow software to clear the IRQ latch during a break interrupt, write a logic 1 to the BCFE bit. If a latch
is cleared during the break state, it remains cleared when the MCU exits the break state.
To protect CPU interrupt flags during the break state, write a logic 0 to the BCFE bit. With BCFE at logic
0 (its default state), writing to the ACK bit in the IRQ status and control register during the break state has
no effect on the IRQ interrupt flags.
17.6 IRQ Registers
Each IRQ is controlled and monitored by an status and control register.
17.6.1 IRQ1 Status and Control Register
The IRQ1 status and control register (INTSCR1) controls and monitors operation of IRQ1. The INTSCR1
has the following functions:
IRQ1F — IRQ1 Flag Bit
ACK1 — IRQ1 Interrupt Request Acknowledge Bit
272
•
•
•
•
•
•
This read-only status bit is high when the IRQ1 interrupt is pending.
Writing a logic 1 to this write-only bit clears the IRQ1 latch. ACK1 always reads as logic 0. Reset clears
ACK1.
1 = IRQ1 interrupt pending
0 = IRQ1 interrupt not pending
IRQ1 Status and Control Register
IRQ2 Status and Control Register
Shows the state of the IRQ1 flag
Clears the IRQ1 latch
Masks IRQ1 interrupt request
Controls triggering sensitivity of the IRQ1 interrupt pin
Address:
When using the level-sensitive interrupt trigger, avoid false interrupts by
masking interrupt requests in the interrupt routine.
Reset:
Read:
Write:
Figure 17-4. IRQ1 Status and Control Register (INTSCR1)
Chapter 21 Break Module
$001E
Bit 7
0
0
= Unimplemented
MC68HC908AP A-Family Data Sheet, Rev. 3
6
0
0
— $001E
— $001C
5
0
0
(BRK).)
NOTE
4
0
0
IRQ1F
3
0
ACK1
2
0
0
IMASK1
1
0
Freescale Semiconductor
MODE1
Bit 0
0
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