MC908AP64CFAE Freescale Semiconductor, MC908AP64CFAE Datasheet - Page 90

IC MCU 64K 8MHZ SPI 48-LQFP

MC908AP64CFAE

Manufacturer Part Number
MC908AP64CFAE
Description
IC MCU 64K 8MHZ SPI 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MC908AP64CFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SCI, SPI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
32
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Cpu Family
HC08
Device Core Size
8b
Frequency (max)
8MHz
Interface Type
SCI/SPI
Total Internal Ram Size
2KB
# I/os (max)
32
Number Of Timers - General Purpose
4
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Controller Family/series
HC08
No. Of I/o's
32
Ram Memory Size
2KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08AP
Core
HC08
Data Bus Width
8 bit
Data Ram Size
2 KB
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908AP64E, M68CBL05CE
Minimum Operating Temperature
- 40 C
Package
48LQFP
Family Name
HC08
Maximum Speed
8 MHz
Operating Supply Voltage
3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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Clock Generator Module (CGM)
PRE1 and PRE0 — Prescaler Program Bits
VPR1 and VPR0 — VCO Power-of-Two Range Select Bits
90
These read/write bits control a prescaler that selects the prescaler power-of-two multiplier, P. (See
6.3.3 PLL Circuits
PLLON bit is set. Reset clears these bits.
These prescaler bits affects the relationship between the VCO clock and the final system bus clock.
These read/write bits control the VCO’s hardware power-of-two range multiplier E that, in conjunction
with L (See
Register.) controls the hardware center-of-range frequency, f
the PLLON bit is set. Reset clears these bits.
PLLON and BCS have built-in protection that prevents the base clock
selector circuit from selecting the VCO clock as the source of the base clock
if the PLL is off. Therefore, PLLON cannot be cleared when BCS is set, and
BCS cannot be set when PLLON is clear. If the PLL is off (PLLON = 0),
selecting CGMPCLK requires two writes to the PLL control register. (See
6.3.8 Base Clock Selector
6.3.3 PLL
NOTE: Do not program E to a value of 3.
and
PRE1 and PRE0
VPR1 and VPR0
Circuits,
6.3.6 Programming the
00
01
10
11
00
01
10
Table 6-2. PRE1 and PRE0 Programming
Table 6-3. VPR1 and VPR0 Programming
MC68HC908AP A-Family Data Sheet, Rev. 3
6.3.6 Programming the
Circuit.)
NOTE
PLL.) PRE1 and PRE0 cannot be written when the
P
E
0
1
2
3
0
1
2
PLL, and
VRS
Prescaler Multiplier
VCO Power-of-Two
. VPR1:VPR0 cannot be written when
Range Multiplier
6.5.4 PLL VCO Range Select
1
2
4
8
1
2
4
Freescale Semiconductor

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