M30260F6AGP#U5A Renesas Electronics America, M30260F6AGP#U5A Datasheet - Page 264
![IC M16C MCU FLASH 48K 48LQFP](/photos/12/19/121983/m30260f6agp_u5a_sml.jpg)
M30260F6AGP#U5A
Manufacturer Part Number
M30260F6AGP#U5A
Description
IC M16C MCU FLASH 48K 48LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/26r
Datasheet
1.M30260F3AGPU5A.pdf
(354 pages)
Specifications of M30260F6AGP#U5A
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, PWM, Voltage Detect, WDT
Number Of I /o
39
Program Memory Size
48KB (48K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
48-LQFP
Cpu Family
R8C
Device Core Size
16b
Frequency (max)
20MHz
Interface Type
UART
Total Internal Ram Size
2KB
# I/os (max)
39
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3V
On-chip Adc
12-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-20C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Package
48LQFP
Family Name
R8C
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
39
Number Of Timers
8
For Use With
R0K33026AS000BE - KIT DEV EVALUATION M16C/26A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Available stocks
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Price
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M30260F6AGP#U5AM30260F6AGP#D3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
M30260F6AGP#U5AM30260F6AGP#U3
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M30260F6AGP#U5AM30260F6AGP#U3A
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17.6 Precautions in CPU Rewrite Mode
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17.6.1 Operation Speed
17.6.2 Prohibited Instructions
17.6.3 Interrupts
17.6.4 How to Access
17.6.5 Writing in the User ROM Space
2
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Described below are the precautions to be observed when rewriting the flash memory in CPU rewrite mode.
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_______ _____
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When CPU clock source is the main clock, before entering CPU rewrite mode (EW0 or EW1 mode),
select 10 MHz or below for CPU clock using the CM06 bit in the CM0 register and the CM17 to CM16
bits in the CM1 register. Also, when selecting f
before entering CPU rewrite mode (EW0 or EW1 mode), the ROCR3 to ROCR2 bits in the ROCR
register set the CPU clock division rate to “divide-by-4” or “divide-by-8”.
On both cases, set the PM17 bit in the PM1 register to “1” (with wait state).
The following instructions cannot be used in EW0 mode because the CPU tries to read data in the
flash memory: UND instruction, INTO instruction, JMPS instruction, JSRS instruction, and BRK in-
struction
EW0 Mode
EW1 Mode
To set the FMR01, FMR02, FMR11 or FMR16 bit to “1”, write “1” after first setting the bit to “0”. Do not
generate an interrupt or a DMA transfer between the instruction to set the bit to “0” and the instruction
to set it to “1”. When the NMI function is selected, set the bit while an “H” signal is applied to the P8
NMI/SD pin.
F
2
17.6.5.1 EW0 Mode
17.6.5.2 EW1 Mode
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• To use interrupts having vectors in a relocatable vector table, the vectors must be relocated to the
• The NMI and watchdog timer interrupts can be used since the FMR0 and FMR1 registers are
• The address match interrupt can not be used since the CPU tries to read data in the flash memory.
• Do not acknowledge any interrupts with vectors in the relocatable vector table or the address
• If the supply voltage drops while rewriting the block where the rewrite control program is stored,
• Do not rewrite the block where the rewrite control program is stored.
b
o r
1 .
RAM area.
forcibly reset when either interrupt is generated. However, the jump addresses for each interrupt
service routines to the fixed vector table are set and interrupt programs are required. Flash
memory rewrite operation is halted when the NMI or watchdog timer interrupt is generated. Set the
FMR01 bit to “1” and execute the rewrite and erase program again after exiting the interrupt rou-
tine.
match interrupt during the auto-program or erase-suspend function.
the flash memory can not be rewritten, because the rewrite control program is not correctly rewrit-
ten. If this error occurs, rewrite the user ROM area in standard serial I/O mode or parallel I/O
mode.
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page 245
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(ROC) of a on-chip oscillator as a CPU clock source,
17. Flash Memory Version
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