M30622SAFP#U5 Renesas Electronics America, M30622SAFP#U5 Datasheet - Page 230
M30622SAFP#U5
Manufacturer Part Number
M30622SAFP#U5
Description
IC M16C MPU ROMLESS 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheets
1.QSK-62P_PLUS.pdf
(103 pages)
2.M30622SAFPU5.pdf
(277 pages)
3.M30622SAFPU5.pdf
(617 pages)
4.M30622SAFPU5.pdf
(308 pages)
Specifications of M30622SAFP#U5
Core Processor
M16C/60
Core Size
16-Bit
Speed
16MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
50
Program Memory Type
ROMless
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-QFP
For Use With
867-1000 - KIT QUICK START RENESAS 62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
- QSK-62P_PLUS PDF datasheet
- M30622SAFPU5 PDF datasheet #2
- M30622SAFPU5 PDF datasheet #3
- M30622SAFPU5 PDF datasheet #4
- Current page: 230 of 277
- Download datasheet (4Mb)
CPU Rewrite Mode (Flash Memory Version)
Figure 1.26.6. Lock bit program flowchart
Erase All Unlock Blocks Command (A7
Lock Bit Program Command (77
By writing the command code “A7
in the second bus cycle that follows, the system starts erasing blocks successively.
Whether the erase all unlock blocks command is terminated can be confirmed by reading the status
register or the flash memory control register 0, in the same way as for block erase. Also, the status
register can be read out to know the result of the auto erase operation.
When the lock bit disable select bit of the flash memory control register 0 = 1, all blocks are erased no
matter how the lock bit is set. On the other hand, when the lock bit disable select bit = 0, the function of
the lock bit is effective and only nonlocked blocks (where lock bit data = 1) are erased.
By writing the command code “77
in the second bus cycle that follows to the block address of a flash memory block, the system sets the
lock bit for the specified block to 0 (locked).
Figure 1.26.6 shows an example of a lock bit program flowchart. The status of the lock bit (lock bit
data) can be read out by a read lock bit status command.
Whether the lock bit program command is terminated can be confirmed by reading the status register
or the flash memory control register 0, in the same way as for page program.
For details about the function of the lock bit and how to reset the lock bit, refer to the section where the
data protect function is detailed.
RY/BY status flag
Lock bit program
block address
Write 77
Write D0
completed
SR4 = 0?
16
16
16
Start
= 1?
/D0
” in the first bus cycle and the confirmation command code “D0
” in the first bus cycle and the confirmation command code “D0
YES
YES
16
16
16
16
)
/D0
NO
16
)
NO
Lock bit program in
error
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
M16C / 62A Group
Mitsubishi microcomputers
16
16
227
”
”
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