MC9S12C64MFAE Freescale Semiconductor, MC9S12C64MFAE Datasheet - Page 394

IC MCU 64K FLASH 4K RAM 48-LQFP

MC9S12C64MFAE

Manufacturer Part Number
MC9S12C64MFAE
Description
IC MCU 64K FLASH 4K RAM 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheets

Specifications of MC9S12C64MFAE

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
31
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
S12C
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
4 KB
Interface Type
CAN/SCI/SPI
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
31
Number Of Timers
8
Operating Supply Voltage
3.3 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
M68EVB912C32EE
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Chapter 13 Serial Communications Interface (S12SCIV2) Block Description
13.4
This section provides a complete functional description of the SCI block, detailing the operation of the
design from the end user perspective in a number of subsections.
Figure 13-9
communication between the CPU and remote devices, including other CPUs. The SCI transmitter and
receiver operate independently, although they use the same baud rate generator. The CPU monitors the
status of the SCI, writes the data to be transmitted, and processes received data.
394
CLOCK
BUS
RXD
SBR12–SBR0
Functional Description
shows the structure of the SCI module. The SCI allows full duplex, asynchronous, NRZ serial
GENERATOR
BAUD RATE
T8
÷16
SHIFT REGISTER
SHIFT REGISTER
DATA FORMAT
AND WAKEUP
TRANSMIT
TRANSMIT
REGISTER
MC9S12C-Family / MC9S12GC-Family
CONTROL
CONTROL
CONTROL
SCI DATA
REGISTER
SCI DATA
RECEIVE
RECEIVE
Figure 13-9. SCI Block Diagram
Rev 01.24
LOOPS
LOOPS
WAKE
RSRC
RSRC
RWU
SBK
RE
ILT
PE
PT
TE
M
RDRF
TDRE
IDLE
RAF
OR
NF
TC
R8
FE
PF
RIE
TCIE
ILIE
TIE
Freescale Semiconductor
TXD
TO CPU
IRQ

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