MC9S12C64MFAE Freescale Semiconductor, MC9S12C64MFAE Datasheet - Page 397

• Manufacturer Part Number: MC9S12C64MFAE
• Description: IC MCU 64K FLASH 4K RAM 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12C64MFAE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 31
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-LQFP
• Processor Series: S12C
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 4 KB
• Interface Type: CAN/SCI/SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 31
• Number Of Timers: 8
• Operating Supply Voltage: 3.3 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: M68EVB912C32EE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

13.4.3
13.4.3.1
The SCI transmitter can accommodate either 8-bit or 9-bit data characters. The state of the M bit in SCI
control register 1 (SCICR1) determines the length of data characters. When transmitting 9-bit data, bit T8
in SCI data register high (SCIDRH) is the ninth bit (bit 8).
13.4.3.2
To transmit data, the MCU writes the data bits to the SCI data registers (SCIDRH/SCIDRL), which in turn
are transferred to the transmitter shift register. The transmit shift register then shifts a frame out through
the Tx output signal, after it has prefaced them with a start bit and appended them with a stop bit. The SCI
data registers (SCIDRH and SCIDRL) are the write-only buffers between the internal data bus and the
transmit shift register.
The SCI also sets a flag, the transmit data register empty flag (TDRE), every time it transfers data from the
buffer (SCIDRH/L) to the transmitter shift register.The transmit driver routine may respond to this flag by
Freescale Semiconductor
CLOCK
BUS
SBR12–SBR0
TDRE INTERRUPT REQUEST
TC INTERRUPT REQUEST
Transmitter
Transmitter Character Length
Character Transmission
BAUD DIVIDER
PE
PT
M
GENERATION
PARITY
÷ 16
T8
Figure 13-11. Transmitter Block Diagram
MC9S12C-Family / MC9S12GC-Family
H
8
11-BIT TRANSMIT SHIFT REGISTER
TDRE
TCIE
TIE
TC
7
Chapter 13 Serial Communications Interface (S12SCIV2) Block Description
6
Rev 01.24
5
SCI DATA REGISTERS
TRANSMITTER CONTROL
INTERNAL BUS
4
3
2
TE
1
0
SBK
L
CONTROL
LOOP
LOOPS
RSRC
TO
RXD
TXD
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