M30624FGPGP#U3C Renesas Electronics America, M30624FGPGP#U3C Datasheet - Page 30
M30624FGPGP#U3C
Manufacturer Part Number
M30624FGPGP#U3C
Description
IC M16C MCU FLASH 256K 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheets
1.QSK-62P_PLUS.pdf
(103 pages)
2.M30622SAFPU5.pdf
(308 pages)
3.M30620SPGPU3C.pdf
(423 pages)
Specifications of M30624FGPGP#U3C
Core Processor
M16C/60
Core Size
16-Bit
Speed
24MHz
Connectivity
I²C, IEBus, UART/USART
Peripherals
DMA, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 26x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Package
100LQFP
Family Name
M16C
Maximum Speed
24 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
87
Interface Type
UART
On-chip Adc
26-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
11
For Use With
867-1000 - KIT QUICK START RENESAS 62PR0K33062PS001BE - R0K33062P STARTER KITR0K33062PS000BE - KIT EVAL STARTER FOR M16C/62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Chapter 1 Overview
Figure 1.7.3 Register bit specification
Figure 1.7.4 Addressing modes used for memory bit specification
Table 1.7.1 Bit-Specifying Address Range
1.7.3 Bits
bit,base:16
bit,base:8[SB]
bit,base:11[SB]
bit,base:16[SB]
bit,base:8[FB]
[An]
base:8[An]
base:16[An]
Addressing
Figure 1.7.3 shows register bit specification.
Register bits can be specified by register direct (bit, Rn or bit, An). Use bit, Rn to specify a bit in data
register (Rn); use bit, An to specify a bit in address register (An).
Bits in each register are assigned bit numbers 0-15, from LSB to MSB. For bit in bit, Rn and bit, An, you
can specify a bit number in the range of 0 to 15.
Figure 1.7.4 shows addressing modes used for memory bit specification. Table 1.7.1 lists the address
range in which you can specify bits in each addressing mode. Be sure to observe the address range in
Table 1.7.1 when specifying memory bits.
Register bits
bit,Rn
(bit: 0 to 15, n: 0 to 3)
Memory bits
Addressing modes
b15
Lower limit (address)
00000
[SB]
[SB]
[SB]
[FB]Å|00010
00000
base:8
base:16
16
16
Rn
Specification range
Absolute addressing
SB-based relative
addressing
FB-based relative
addressing
Address register-based indirect
addressing
Address register-based relative
addressing
16
Upper limit (address)
01FFF
[SB]+0001F
[SB]+000FF
[SB]+01FFF
[FB]+0000F
01FFF
base:8+01FFF
base:16+01FFF
b0
16
16
12
16
16
16
16
bit,An
(bit: 0 to 15, n: 0 to 1)
16
16
The access range is 00000
The access range is 00000
The access range is 00000
The access range is 00000
The access range is 00000
The access range is 00000
b15
bit,base:8
bit,base:16
bit,base:8[SB]
bit,base:8[FB]
base:16[An]
bit,base:11[SB]
bit,base:16[SB]
[An]
base:8[An]
bit,base:16
An
Remarks
1.7 Data Types
16
16
16
16
16
16
to 0FFFF
to 0FFFF
to 0FFFF
to 0FFFF
to 020FE
to 0FFFF
b0
16
16
16
16
16
16
.
.
.
.
.
.
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