DF2398TE20V Renesas Electronics America, DF2398TE20V Datasheet - Page 236
![IC H8S MCU FLASH 256K 120TQFP](/photos/12/21/122170/df2398te20v_sml.jpg)
DF2398TE20V
Manufacturer Part Number
DF2398TE20V
Description
IC H8S MCU FLASH 256K 120TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of DF2398TE20V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
87
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
120-TQFP, 120-VQFP
For Use With
YR0K42378FC000BA - KIT EVAL FOR H8S/2378
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
HD64F2398TE20V
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2398TE20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 2 Instruction Descriptions
2.2.60 (5)
SHLR (SHift Logical Right)
Operation
ERd (right logical shift)
Assembly-Language Format
SHLR.L ERd
Operand Size
Longword
Description
This instruction shifts the bits in a 32-bit register ERd (destination operand) one bit to the right.
The least significant bit (bit 0) shifts into the carry flag. The most significant bit (bit 31) is cleared
to 0.
Available Registers
ERd: ER0 to ER7
Operand Format and Number of States Required for Execution
Notes
Rev. 4.00 Feb 24, 2006 page 220 of 322
REJ09B0139-0400
Register direct
Addressing
Mode
SHLR (L)
Mnemonic
0
SHLR.L
MSB
b31
ERd
Operands
ERd
.
. . . . . .
.
1st byte
1
.
.
1
Condition Code
H: Previous value remains unchanged.
N: Always cleared to 0.
Z: Set to 1 if the result is zero; otherwise
V: Always cleared to 0.
C: Receives the previous value in bit 0.
.
2nd byte
3
.
Instruction Format
cleared to 0.
—
I
0 erd
UI H
—
LSB
b0
—
3rd byte
—
U
C
N
0
4th byte
Z
Shift Logical
V
0
States
No. of
C
1
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