ADUC7129BSTZ126-RL Analog Devices Inc, ADUC7129BSTZ126-RL Datasheet - Page 70
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ADUC7129BSTZ126-RL
Manufacturer Part Number
ADUC7129BSTZ126-RL
Description
IC DAS MCU ARM7 ADC/DDS 80-LQFP
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet
1.EVAL-ADUC7128QSPZ.pdf
(92 pages)
Specifications of ADUC7129BSTZ126-RL
Core Size
16/32-Bit
Program Memory Size
126KB (126K x 8)
Core Processor
ARM7
Speed
41.78MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
PLA, POR, PWM, PSM, Temp Sensor, WDT
Number Of I /o
38
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x12b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
80-LQFP
Controller Family/series
(ARM7) ADUC
No. Of I/o's
40
Cpu Speed
41.78MHz
No. Of Timers
5
Digital Ic Case Style
LQFP
Embedded Interface Type
I2C, SPI, UART
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
ADUC7129BSTZ126-RLTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ADUC7129BSTZ126-RL
Manufacturer:
Analog Devices Inc
Quantity:
10 000
ADuC7128/ADuC7129
Table 96. Element Input/Output
Element
0
1
2
3
4
5
6
7
PLA MMRs Interface
The PLA peripheral interface consists on 21 MMRs, as shown
in Table 97.
Table 98. PLAELMx MMR Bit Designations
Bit
31:11
10:9
8:7
6
5
4:1
0
PLA Block 0
Value
00
01
10
11
00
01
10
11
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Input
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P0.0
PLAELM0
Element 15
Element 2
Element 4
Element 6
Element 1
Element 3
Element 5
Element 7
Output
P1.7
P0.4
P0.5
P0.6
P0.7
P2.0
P2.1
P2.2
Element
8
9
10
11
12
13
14
15
PLAELM1 to
PLAELM7
Element 0
Element 2
Element 4
Element 6
Element 1
Element 3
Element 5
Element 7
PLA Block 1
Input
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
PLAELM8
Element 7
Element 10
Element 12
Element 14
Element 9
Element 11
Element 13
Element 15
Output
P4.0
P4.1
P4.2
P4.3
P4.4
P4.5
P4.6
P4.7
Rev. 0 | Page 70 of 92
PLAELM9 to
PLAELM15
Element 8
Element 9
Element 10
Element 12
Element 14
Element 11
Element 13
Element 15
Table 97. PLA MMRs
Name
PLAELMx
PLACLK
PLAIRQ
PLAADC
PLADIN
PLAOUT
A PLA tool is provided in the development system to easily
configure the PLA.
Reserved.
Mux (0) Control. Select feedback source.
Mux (1) Control. Select feedback source.
Mux (3) Control.
Look-Up Table Control.
0
NOR
B AND NOT A
NOT A
A AND NOT B
NOT B
EXOR
NAND
AND
EXNOR
B
NOT A OR B
A
A OR NOT B
OR
Description
Mux (2) Control.
1
Mux (4) Control.
Set by user to select the output of Mux (0).
Cleared by user to select the bit value from PLADIN.
Set by user to bypass the flip-flop.
Cleared by user to select the flip-flop.
Cleared by default.
Set by user to select the input pin of the particular element.
Cleared by user to select the output of Mux (1).
Description
Element 0 to Element 15 Control Registers.
Configure the input and output mux of each
element, select the function in the look-up table,
and bypass/use the flip-flop.
Clock Selection for the Flip-Flops of Block 0 and
Clock Selection for the Flip-Flops of Block 1.
Enable IRQ0 and/or IRQ1. Select the source of the IRQ.
PLA Source from ADC Start Conversion Signal.
Data Input MMR for PLA.
Data Output MMR for PLA. This register is always
updated.