DS5001FP-16+ Maxim Integrated Products, DS5001FP-16+ Datasheet - Page 4

• Manufacturer Part Number: DS5001FP-16+
• Description: IC MPU 128K 16MHZ 80-TQFP
• Manufacturer: Maxim Integrated Products
• Series: DS500xr

Specifications of DS5001FP-16+

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SIO, UART/USART
• Peripherals: Power-Fail Reset, WDT
• Number Of I /o: 32
• Program Memory Type: SRAM
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 80-MQFP, 80-PQFP
• Processor Series: DS500x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 128 KB
• Interface Type: UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: 0 C
• Program Memory Size: 128 KB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIN DESCRIPTION
11, 9, 7,
5, 1, 79,
80 PIN
15, 17,
19, 21,
25, 27,
49, 50,
51, 56,
58, 60,
77, 75
29, 31
64, 66
47, 48
36
38
39
40
41
44
45
46
68
34
70
52
13
12
54
PIN
44 PIN
(P0.5)
(P1.3)
14, 15
31
44
—
10
—
11
—
12
13
—
25
27
16
39
38
17
8
6
P3.6/
P3.0/RX
P3.1/TX
P3.7/
XTAL2,
P3.4/T0
P3.5/T1
XTAL1
NAME
P0.0–
P1.0–
P2.0–
GND
V
P3.2/
P3.3/
ALE
PSEN
RST
P0.7
P1.7
P2.7
INT0
INT1
V
V
D
D
CCO
CC
LI
WR
RD
General-Purpose I/O Port 0. This port is open-drain and cannot drive a logic 1. It
requires external pullups. Port 0 is also the multiplexed expanded address/data bus.
When used in this mode, it does not require pullups.
General-Purpose I/O Port 1
General-Purpose I/O Port 2. Also serves as the MSB of the address in expanded
memory accesses, and as pins of the RPC mode when used.
General-Purpose I/O Port Pin 3.0. Also serves as the receive signal for the on
board UART. This pin should not be connected directly to a PC COM port.
General-Purpose I/O Port Pin 3.1. Also serves as the transmit signal for the on
board UART. This pin should not be connected directly to a PC COM port.
General-Purpose I/O Port Pin 3.2. Also serves as the active-low external interrupt
0.
General-Purpose I/O Port Pin 3.3. Also serves as the active-low external interrupt
1.
General-Purpose I/O Port Pin 3.4. Also serves as the timer 0 input.
General-Purpose I/O Port Pin 3.5. Also serves as the timer 1 input.
General-Purpose I/O Port Pin. Also serves as the write strobe for expanded bus
operation.
General-Purpose I/O Port Pin. Also serves as the read strobe for expanded bus
operation.
Program Store Enable. This active-low signal is used to enable an external
program memory when using the expanded bus. It is normally an output and should
be unconnected if not used.
time,
is already in a reset state. The device that pulls down should be open drain since it
must not interfere with
Active-High Reset Input. A logic 1 applied to this pin will activate a reset state.
This pin is pulled down internally so this pin can be left unconnected if not used. An
RC power-on reset circuit is not needed and is not recommended.
Address Latch Enable. Used to demultiplex the multiplexed expanded address/data
bus on port 0. This pin is normally connected to the clock input on a ’373 type
transparent latch.
Crystal Connections. Used to connect an external crystal to the internal oscillator.
XTAL1 is the input to an inverting amplifier and XTAL2 is the output.
Logic Ground
Power Supply, +5V
V
level of V
The lithium cell remains isolated from a load. When V
switches to the V
Lithium Voltage Input. Connect to a lithium cell greater than V
than V
CC
Output. This is switched between V
PSEN
LImax
CC
as shown in the electrical specifications. Nominal value is +3V.
is pulled down externally. This should only be done once the DS5001FP
. When power is above the lithium input, power will be drawn from V
LI
source. V
4 of 27
PSEN
PSEN
CCO
under normal operation.
should be connected to the V
also is used to invoke the bootstrap loader. At this
FUNCTION
CC
and V
LI
by internal circuits based on the
CC
is below V
CC
pin of an SRAM.
LIMIN
LI
, the V
and no greater
DS5001FP
CCO
CC
.