DS5001FP-16+ Maxim Integrated Products, DS5001FP-16+ Datasheet - Page 6
![IC MPU 128K 16MHZ 80-TQFP](/photos/7/36/73625/406-80-tqfp_sml.jpg)
DS5001FP-16+
Manufacturer Part Number
DS5001FP-16+
Description
IC MPU 128K 16MHZ 80-TQFP
Manufacturer
Maxim Integrated Products
Series
DS500xr
Datasheet
1.DS5001FP-16.pdf
(27 pages)
Specifications of DS5001FP-16+
Core Processor
8051
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, SIO, UART/USART
Peripherals
Power-Fail Reset, WDT
Number Of I /o
32
Program Memory Type
SRAM
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
80-MQFP, 80-PQFP
Processor Series
DS500x
Core
8051
Data Bus Width
8 bit
Data Ram Size
128 KB
Interface Type
UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
0 C
Program Memory Size
128 KB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
PIN DESCRIPTION (continued)
INSTRUCTION SET
The DS5001FP executes an instruction set that is object code-compatible with the industry standard 8051
microcontroller. As a result, software development packages such as assemblers and compilers that have
been written for the 8051 are compatible with the DS5001FP. A complete description of the instruction
set and operation are provided in the Secure Microcontroller User’s Guide. Also note that the DS5001FP
is embodied in the DS2251T module. The DS2251T combines the DS5001FP with between 32k and 128k
of SRAM, a lithium cell, and a real-time clock. This is packaged in a 72-pin SIMM module.
MEMORY ORGANIZATION
Figure 2 illustrates the memory map accessed by the DS5001FP. The entire 64k of program and 64k of
data are potentially available to the byte-wide bus. This preserves the I/O ports for application use. The
user controls the portion of memory that is actually mapped to the byte-wide bus by selecting the program
range and data range. Any area not mapped into the NV RAM is reached by the expanded bus on ports 0
and 2. An alternate configuration allows dynamic partitioning of a 64k space as shown in Figure 3.
Selecting PES=1 provides another 64k of potential data storage or memory-mapped peripheral space as
shown in Figure 4. These selections are made using special function registers. The memory map and its
controls are covered in detail in the Secure Microcontroller User’s Guide.
80 PIN
42
43
14
73
PIN
44 PIN
—
—
40
—
NAME
MSEL
VRST
N.C.
PF
This I/O pin (open drain with internal pullup) indicates that the power supply
(V
this occurs, the DS5001FP drives this pin to a logic 0. Because the micro is lithium-
backed, this signal is guaranteed even when V
also forces a reset if pulled low externally. This allows multiple parts to synchronize
their power-down resets.
This output goes to a logic 0 to indicate that V
switched to lithium backup. Because the micro is lithium-backed, this signal is
guaranteed even when V
lithium-powered current to isolate battery-backed functions from non-battery-backed
functions.
Memory Select. This signal controls the memory size selection. When MSEL =
+5V, the DS5001FP expects to use 32k x 8 SRAMs. When MSEL = 0V, the
DS5001FP expects to use a 128k x 8 SRAM. MSEL must be connected regardless of
partition, mode, etc.
No Connection
CC
) has fallen below the V
6 of 27
CC
= 0V. The normal application of this signal is to control
CCmin
level and the micro is in a reset state. When
FUNCTION
CC
CC
= 0V. Because it is an I/O pin, it
< V
LI
and the micro has
DS5001FP