PIC12F519-I/P Microchip Technology, PIC12F519-I/P Datasheet - Page 25
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PIC12F519-I/P
Manufacturer Part Number
PIC12F519-I/P
Description
IC PIC MCU FLASH 1KX12 8DIP
Manufacturer
Microchip Technology
Series
PIC® 12Fr
Datasheets
1.PIC12F519-ISN.pdf
(96 pages)
2.PIC12F519-ISN.pdf
(4 pages)
3.PIC12F519-ISN.pdf
(22 pages)
4.PIC12F519-IP.pdf
(88 pages)
Specifications of PIC12F519-I/P
Program Memory Type
FLASH
Program Memory Size
1.5KB (1K x 12)
Package / Case
8-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
8MHz
Peripherals
POR, WDT
Number Of I /o
5
Ram Size
41 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC12F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
41 B
Interface Type
USB
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
6
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
Package
8PDIP
Device Core
PIC
Family Name
PIC12
Maximum Speed
8 MHz
Operating Supply Voltage
2.5|3.3|5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162096 - HEADER MPLAB ICD2 PIC16F526 8/14AC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC12F519-I/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
6.0
As with any other register, the I/O register(s) can be
written and read under program control. However, read
instructions (e.g., MOVF PORTB,W) always read the I/O
pins independent of the pin’s Input/Output modes. On
Reset, all I/O ports are defined as input (inputs are at
high-impedance) since the I/O control registers are all
set.
6.1
GPIO is an 8-bit I/O register. Only the low-order 6 bits
are used (GP<5:0>). Bits 7 and 6 are unimplemented
and read as ‘0’s. Please note that GP3 is an input-only
pin. The Configuration Word can set several I/O’s to
alternate functions. When acting as alternate functions,
the pins will read as ‘0’ during a port read. Pins GP0,
GP1, and GP3 can be configured with weak pull-ups
and also for wake-up on change. The wake-up on
change and weak pull-up functions are not pin select-
able. If GP3/MCLR is configured as MCLR, weak pull-
up is always on and wake-up on change for this pin is
not enabled.
TABLE 6-1:
© 2008 Microchip Technology Inc.
Note 1: When MCLRE = 1, the weak pull-up on GP3/MCLR is always
2:
I/O PORT
GPIO
enabled.
GP0
GP1
GP2
GP3
GP4
GP5
GP6
WPU = Weak pull-up; WU = Wake-up.
Pin
WEAK PULL-UP ENABLED PINS
WPU
Y
N
N
N
N
Y
Y
(1)
WU
Y
Y
N
Y
N
N
N
6.2
The Output Driver Control registers are loaded with
the contents of the W Register by executing the TRIS
f instruction. A ‘1’ from a TRISGPIO Register bit puts
the corresponding output driver in a high-impedance
(Input) mode. A ‘0’ puts the contents of the output data
latch on the selected pins, enabling the output buffer.
The TRISGPIO register is “write-only”. Bits <5:0> are
set (output drivers disabled) upon Reset.
Note:
TRIS Registers
If the T0CS bit is set to ‘1’, it will override
the TRISGPIO function on the T0CKI pin.
PIC12F519
DS41319B-page 23