PIC12F615-I/MD Microchip Technology, PIC12F615-I/MD Datasheet - Page 23

• Manufacturer Part Number: PIC12F615-I/MD
• Description: IC PIC MCU FLASH 1KX14 8DFN
• Manufacturer: Microchip Technology
• Series: PIC® 12Fr

Specifications of PIC12F615-I/MD

• Core Size: 8-Bit
• Program Memory Size: 1.75KB (1K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 5
• Program Memory Type: FLASH
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-DFN
• Controller Family/series: PIC12
• No. Of I/o's: 6
• Ram Memory Size: 64Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Digital Ic Case Style: DFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: APGRD004 - REF DESIGN MOD AUTO AMBNT LIGHTAC162083 - HEADER MPLAB ICD2 PIC16F616 8/14AC164326 - MODULA SKT PM3 20QFNXLT08DFN2 - SOCKET TRANSITION ICE 14DIP/8DFN
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

2.2.2.7
The Alternate Pin Function Control (APFCON) register
is used to steer specific peripheral input and output
functions between different pins. For this device, the
P1A, P1B and Timer1 Gate functions can be moved
between different pins.
The APFCON register bits are shown in Register 2-7.
REGISTER 2-7:
© 2006 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-5
bit 4
bit 3-2
bit 1
bit 0
Note 1: PIC12F615/HV615 only.
U-0
—
2: Alternate pin function.
APFCON Register
(PIC12F615/HV615 only)
Unimplemented: Read as ‘0’
T1GSEL: TMR1 Input Pin Select bit
1 = T1G function is on GP3/T1G
0 = T1G function is on GP4/AN3/CIN1-/T1G/P1B
Unimplemented: Read as ‘0’
P1BSEL: P1B Output Pin Select bit
1 = P1B function is on GP4/AN3/CIN1-/T1G/P1B
0 = P1B function is on GP0/AN0/CIN+/P1B/ICSPDAT
P1ASEL: P1A Output Pin Select bit
1 = P1A function is on GP5/T1CKI/P1A
0 = P1A function is on GP2/AN2/T0CKI/INT/COUT/CCP1/P1A
U-0
—
APFCON: POWER CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
U-0
—
PIC12F609/615/12HV609/615
T1GSEL
R/W-0
(2)
Preliminary
/MCLR/V
(2)
/OSC1/CLKIN
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PP
U-0
—
(2)
(2)
/OSC2/CLKOUT
/OSC2/CLKOUT
(1)
U-0
—
x = Bit is unknown
P1BSEL
R/W-0
DS41302A-page 21
P1ASEL
R/W-0
bit 0