PIC16F506-I/P Microchip Technology, PIC16F506-I/P Datasheet
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PIC16F506-I/P
Specifications of PIC16F506-I/P
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PIC16F506-I/P Summary of contents
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... Flash Microcontroller *8-bit, 8-pin Devices Protected by Microchip’s Low Pin Count Patent: U.S. Patent No. 5,847,450. Additional U.S. and foreign patents and applications may be issued or pending. © 2006 Microchip Technology Inc. PIC12F510/16F506 Data Sheet Preliminary DS41268B ...
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... PowerMate, PowerTool, Real ICE, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and Zena are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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... Special Function Hardware registers (PIC16F506) • Operating speed – 8 MHz Crystal Oscillator (PIC12F510 – 500 ns instruction cycle (PIC12F510 – 20 MHz Crystal Oscillator (PIC16F506 – 200 ns instruction cycle (PIC16F506) Special Microcontroller Features: • MHz selectable precision internal oscillator: - Factory calibrated to ±1% • ...
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... PIC12F510/16F506 Program Memory Device Flash (words) PIC16F506 PIC12F510 Pin Diagrams PDIP, SOIC and TSSOP RB5/OSC1/CLKIN RB4/OSC2/CLKOUT RB3/MCLR/V RC5/T0CKI RC4/C2OUT PDIP, SOIC, MSOP GP5/OSC1/CLKIN GP4/OSC2 GP3/MCLR/V DS41268B-page 2 Data Memory SRAM (bytes) 1024 67 1024 RB0/AN0/C1IN+/ICSPDAT 2 13 RB1/AN1/C1IN-/ICSPCLK 3 12 RB2/AN2/C1OUT RC0/C2IN RC1/C2IN- ...
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... I/O Port ....................................................................................................................................................................................... 27 6.0 TMR0 Module and TMR0 Register............................................................................................................................................. 39 7.0 Comparator(s) ............................................................................................................................................................................ 43 8.0 Comparator Voltage Reference Module (PIC16F506 only)........................................................................................................ 49 9.0 Analog-to-Digital (A/D) Converter............................................................................................................................................... 51 10.0 Special Features Of The CPU.................................................................................................................................................... 55 11.0 Instruction Set Summary ............................................................................................................................................................ 71 12.0 Development Support................................................................................................................................................................. 79 13.0 Electrical Characteristics ............................................................................................................................................................ 83 14.0 DC and AC Characteristics Graphs and Charts ......................................................................................................................... 96 15 ...
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... PIC12F510/16F506 NOTES: DS41268B-page 4 Preliminary © 2006 Microchip Technology Inc. ...
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... The Power-on Reset (POR) and Device Reset Timer (DRT) eliminate the need for external Reset circuitry. There are four oscillator configurations to choose from (six on the PIC16F506), including INTOSC Internal Oscillator mode and the power-saving LP (Low-power) Oscillator mode. Power-saving Sleep mode, Watchdog Timer and code protection features improve system cost, power and reliability ...
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... PIC12F510/16F506 NOTES: DS41268B-page 6 Preliminary © 2006 Microchip Technology Inc. ...
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... Flash devices, but with all Flash locations and fuse options already programmed by the factory. Certain code and prototype verification procedures do apply before production shipments are available. Please contact your local Microchip Technology sales office for more details. © 2006 Microchip Technology Inc. PIC12F510/16F506 2 ...
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... PIC12F510/16F506 NOTES: DS41268B-page 8 Preliminary © 2006 Microchip Technology Inc. ...
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... See the SUBWF and ADDWF instructions for examples. A simplified block diagram is shown in Figure 3-1 for PIC12F510 with the corresponding device pins described in Table 3-2. A simplified block diagram for PIC16F506 is corresponding device pins described in Table 3-3. Data ...
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... FSR Reg STATUS Reg 3 MUX Device Reset Timer Power-on ALU Reset Watchdog 8 Timer W Reg Internal RC Clock Timer0 T0CKI Preliminary GPIO GP0/ICSPDAT GP1/ICSPCLK GP2 GP3 GP4 GP5 C1IN+ Comparator C1IN- C1OUT V REF AN0 8-bit ADC AN1 AN2 © 2006 Microchip Technology Inc. ...
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... Legend input output, I/O = input/output power, — = Not Used, TTL = TTL input Schmitt Trigger input Analog Voltage © 2006 Microchip Technology Inc. PIC12F510/16F506 Output Input Type Type TTL CMOS Bidirectional I/O port. Can be software pro- grammed for internal weak pull-up and wake-up from Sleep on pin change ...
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... PIC12F510/16F506 FIGURE 3-2: PIC16F506 SERIES BLOCK DIAGRAM 10 Flash Program Memory Program 10 Bus Instruction Reg 8 Instruction Decode & Control Timing OSC1/CLKIN Generation OSC2/CLKOUT MCLR DS41268B-page 12 8 Data Bus Program Counter RAM STACK 1 67 bytes STACK 2 File Registers RAM Addr 9 Addr MUX Indirect ...
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... TABLE 3-3: PIN DESCRIPTIONS – PIC16F506 Name Function RB0/AN0/C1IN+/ICSPDAT RB0 AN0 C1IN+ ICSPDAT RB1/AN1/C1IN-/ICSPCLK RB1 AN1 C1IN- ICSPCLK RB2/AN2/C1OUT RB2 AN2 C1OUT RB3/MCLR/V RB3 PP MCLR V PP RB4/OSC2/CLKOUT RB4 OSC2 CLKOUT RB5/OSC1/CLKIN RB5 OSC1 CLKIN RC0/C2IN+ RC0 C2IN+ RC1/C2IN- RC1 ...
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... Q2, Q3 and Q4 cycles. Data memory is read during Q2 (operand read) and written during Q4 (destination write Fetch INST ( Execute INST (PC) Execute 1 Fetch 2 Execute 2 Fetch 3 Execute 3 Fetch 4 Preliminary Internal Phase Clock Fetch INST ( Execute INST ( Flush Fetch SUB_1 Execute SUB_1 © 2006 Microchip Technology Inc. ...
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... Program memory pages are accessed using STATUS register bit PA0. For the PIC12F510 and PIC16F506, with data memory register files of more than 32 registers, a banking scheme is used. Data memory banks are accessed using the File Select Register (FSR) ...
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... For the PIC12F510, the register file is composed of 10 Special Function Registers, 6 General Purpose Registers and 32 General Purpose Registers accessed by banking (see Figure 4-2). For the PIC16F506, the register file is composed of 13 Special Function Registers, 3 General Purpose Registers and 64 General Purpose Registers accessed by banking (see Figure 4-3). ...
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... Shaded cells = unimplemented or unused. Note 1: The upper byte of the Program Counter is not directly accessible. See Section 4.6 “Program Counter” for an explanation of how to access these bits. TABLE 4-2: SPECIAL FUNCTION REGISTER SUMMARY – PIC16F506 Address Name Bit 7 Bit 6 N/A ...
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... RRF or RLF: SUBWF borrow did not occur Load bit with LSb or MSb, respectively borrow occurred W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared Preliminary R/W-X R/W-X R/W bit Bit is unknown © 2006 Microchip Technology Inc. ...
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... REGISTER 4-2: STATUS REGISTER (ADDRESS: 03h) (PIC16F506) R/W-0 RBWUF bit 7 bit 7 RBWUF: PORTB Reset bit 1 = Reset due to wake-up from Sleep on pin change 0 = After power-up or other Reset bit 6 CWUF: Comparator Reset bit 1 = Reset due to wake-up from Sleep on comparator change 0 = After power-up or other Reset ...
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... W-1 T0CS T0SE PSA Timer0 Rate WDT Rate 128 256 1 : 128 W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared Preliminary W-1 W-1 W-1 PS2 PS1 PS0 bit Bit is unknown © 2006 Microchip Technology Inc. ...
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... REGISTER 4-4: OPTION REGISTER (PIC16F506) W-1 RBWU bit 7 bit 7 RBWU: Enable Wake-up On Pin Change bit (RB0, RB1, RB3, RB4 Disabled 0 = Enabled bit 6 RBPU: Enable Weak Pull-ups bit (RB0, RB1, RB3, RB4 Disabled 0 = Enabled bit 5 T0CS: Timer0 Clock Source Select bit 1 = Transition on T0CKI pin ...
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... R = Readable bit -n = Value at POR DS41268B-page 22 R/W-1 R/W-1 R/W-1 R/W-1 CAL4 CAL3 CAL2 CAL1 W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared Preliminary R/W-1 U-0 CAL0 — bit Bit is unknown © 2006 Microchip Technology Inc. ...
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... PCL Instruction Word Reset to ‘0’ PA0 7 0 STATUS © 2006 Microchip Technology Inc. PIC12F510/16F506 4.6.1 EFFECTS OF RESET The PC is set upon a Reset, which means that the PC addresses the last location in the last page (i.e., the oscillator calibration instruction). After executing MOVLW XX, the PC will roll over to location 00h and begin executing user code ...
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... The FSR<4:0> bits are used to select data memory addresses 00h to 1Fh. PIC16F506 – Uses FSR<6:5>. Selects from Bank 0 to Bank 3. FSR<7> is unimplemented, read as ‘1’. PIC12F510 – Uses FSR<5>. Selects from Bank 0 to Bank 1. FSR<7:6> are unimplemented, read as ‘11’. ...
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... FIGURE 4-6: DIRECT/INDIRECT ADDRESSING (PIC16F506) Direct Addressing (FSR) (opcode Bank Select Location Select 00h Data 0Fh (1) Memory 10h Note 1: For register map detail, see Figure 4-3. © 2006 Microchip Technology Inc. PIC12F510/16F506 Addresses map back to addresses in Bank 0. 1Fh 3Fh 5Fh 7Fh ...
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... PIC12F510/16F506 NOTES: DS41268B-page 26 Preliminary © 2006 Microchip Technology Inc. ...
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... I/O’s to alternate functions. When acting as alternate functions, the pins will read as ‘0’ during a port read. Pins RB0/GP0, RB1/GP1, RB3/GP3 and RB4 (PIC16F506 only) can be configured with weak pull-up and also for wake-up on change. The wake-up on change and weak pull-up functions are not pin select- able ...
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... DS41268B-page 28 FIGURE 5-3: GPPU RBPU MCLRE (1) I/O Pin Reset Data Bus RD Port Q CK Mis-match and DD Note 1: GP3/MCLR pin has a protection diode to V only. Preliminary BLOCK DIAGRAM OF GP3/RB3 (With Weak Pull-up And Wake-up On Change) (1) I/O Pin D SS © 2006 Microchip Technology Inc. ...
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... D Q TRIS Latch TRIS ‘f’ Reset T0CS C1T0CS ADC Pin Enable RD Port T0CKI ADC Note 1: I/O pins have protection diodes © 2006 Microchip Technology Inc. PIC12F510/16F506 FIGURE 5-5: C1OUT (1) I/O Pin Data Bus D Data WR Latch Port CK C1OUTEN W Reg D TRIS Latch TRIS ‘ ...
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... D WR Port CK W I/O Reg (1) pin D TRIS ‘f’ CK (Note 2) Note 1: I/O pins have protection diodes to V and Preliminary BLOCK DIAGRAM OF GP4 Q Data I/O Latch (1) pin Q Q TRIS Latch Q Reset INTOSC/RC RD Port Oscillator OSC1 Circuit and DD . © 2006 Microchip Technology Inc. ...
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... Latch TRIS ‘f’ Reset RD Port Oscillator OSC2 Circuit Note 1: I/O pins have protection diodes Input mode is disabled when pin is used for oscillator. © 2006 Microchip Technology Inc. PIC12F510/16F506 FIGURE 5-9: Data Bus D I/O (1) pin WR Port CK W Reg D TRIS ‘f’ CK ...
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... I/O pins have protection diodes DS41268B-page 32 FIGURE 5-11: Data Bus D Data WR Latch 1 (1) I/O PIN Port Reg D TRIS Latch TRIS ‘f’ CK Reset and DD Note 1: I/O pins have protection diodes Preliminary BLOCK DIAGRAM OF RC3 (1) I/O Pin Port and DD © 2006 Microchip Technology Inc. ...
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... Port CK Q C2OUTEN W Reg D Q TRIS Latch TRIS ‘f’ Reset RD Port Note 1: I/O pins have protection diodes © 2006 Microchip Technology Inc. PIC12F510/16F506 FIGURE 5-13: (1) I/O Pin Data Bus D Data WR Latch Port CK W Reg D TRIS Latch TRIS ‘f’ CK Reset ...
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... I/O PIN FUNCTION ORDER OF PRECEDENCE (PIC16F506) Priority RB0 RB1 1 AN0/C1IN+ AN1/C1IN- 2 TRISB TRISB 3 — — TABLE 5-3: I/O PIN FUNCTION ORDER OF PRECEDENCE (PIC16F506) Priority RC0 RC1 1 C2IN+ C2IN- 2 TRISC TRISC TABLE 5-4: I/O PIN FUNCTION ORDER OF PRECEDENCE (PIC12F510) Priority GP0 GP1 ...
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... Note 1: Multiple column entries for a pin demonstrate the different permutations to arrive at digital functionality for the pin. 2: Shaded cells indicate the bit status does not affect the pins digital functionality. © 2006 Microchip Technology Inc. PIC12F510/16F506 GP1 GP1 GP2 GP2 0 ...
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... Multiple column entries for a pin demonstrate the different permutations to arrive at digital functionality for the pin. 2: Shaded cells indicate the bit status does not affect the pins digital functionality. TABLE 5-7: REQUIREMENTS FOR DIGITAL PIN OPERATION (PIC16F506 PORTC) RC0 RC0 CM2CON0 C2ON ...
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... A pin actively outputting a high or a low should not be driven from external devices at the same time in order to change the level on this pin (“wired OR”, “wired AND”). The resulting high output currents may damage the chip. FIGURE 5-14: SUCCESSIVE I/O OPERATION (PIC16F506 Instruction Fetched ...
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... PIC12F510/16F506 NOTES: DS41268B-page 38 Preliminary © 2006 Microchip Technology Inc. ...
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... The prescaler is shared with the Watchdog Timer (Figure 6-5). 3: Bit C1T0CS is located in the CM1CON0 register, CM1CON0<4>. © 2006 Microchip Technology Inc. PIC12F510/16F506 The second Counter mode uses the output of the com- parator to increment Timer0. It can be entered in two different ways. The first way is selected by setting the T0CS bit (OPTION< ...
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... GPWU GPPU (1) N/A TRISGPIO — — Legend: Shaded cells not used by Timer0, – = unimplemented unknown unchanged. Note 1: The TRIS of the T0CKI pin is overridden when T0CS = 1. 2: For PIC12F510. 3: For PIC16F506. DS41268B-page NT0 Read TMR0 Read TMR0 Write TMR0 reads NT0 reads NT0 ...
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... Timer0 module means that there is no prescaler for the WDT and vice-versa. The PSA and PS<2:0> bits (OPTION<3:0>) determine prescaler assignment and prescale ratio. © 2006 Microchip Technology Inc. PIC12F510/16F506 When a prescaler is used, the external clock input is divided by the asynchronous ripple counter-type prescaler, so that the prescaler output is symmetrical ...
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... Timer WDT Enable bit Note 1: T0CS, T0SE, PSA, PS<2:0> are bits in the OPTION register. 2: T0CKI is shared with pin GP2 on the PIC12F510 and shared with RC5 on the PIC16F506. 3: Bit C1T0CS is located in the CM1CON0 register. DS41268B-page 42 To change prescaler from the WDT to the Timer0 module, use the sequence shown in Example 6-2 ...
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... COMPARATOR(S) The PIC12F510 contains one analog comparator module. The PIC16F506 contains two comparators and a comparator voltage reference. REGISTER 7-1: CM1CON0 REGISTER (ADDRESS: 07h) (PIC12F510) R-1 R/W-1 C1OUT C1OUTEN bit 7 bit 7 C1OUT: Comparator Output bit > < bit 6 C1OUTEN: Comparator Output Enable bit ...
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... PIC12F510/16F506 REGISTER 7-2: CM1CON0 REGISTER (ADDRESS: 08h) (PIC16F506) R-1 R/W-1 C1OUT C1OUTEN bit 7 bit 7 C1OUT: Comparator Output bit > < bit 6 C1OUTEN: Comparator Output Enable bit 1 = Output of comparator is NOT placed on the C1OUT pin 0 = Output of comparator is placed in the C1OUT pin bit 5 C1POL: Comparator Output Polarity bit ...
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... REGISTER 7-3: CM2CON0 REGISTER (ADDRESS: 0Bh) (PIC16F506) R-1 R/W-1 C2OUT C2OUTEN bit 7 bit 7 C2OUT: Comparator Output bit > < bit 6 C2OUTEN: Comparator Output Enable bit 1 = Output of comparator is NOT placed on the C2OUT pin 0 = Output of comparator is placed in the C2OUT pin bit 5 C2POL: Comparator Output Polarity bit ...
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... FIGURE 7-1: COMPARATOR 1 BLOCK DIAGRAM FOR PIC12F510/16F506 C1PREF C1IN- 0 C1IN+ 1 C1NREF C1IN- 1 0.6 V REF 0 Note 1: When C1ON = 0, the comparator, C1, will produce a ‘0’ output to the XOR Gate. FIGURE 7-2: COMPARATOR 2 BLOCK DIAGRAM (PIC16F506 ONLY) C2PREF1 C2PREF2 1 C2IN+ 1 C1IN C2IN- C2NREF C2IN REF ...
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... V IN the digital output of the comparator is adjusted accord- ingly (Figure 7-3). Please see Section 8.0 “Compara- tor Voltage Reference Module (PIC16F506 only)” for internal reference specifications. 7.3 Comparator Response Time Response time is the minimum time after selecting a new reference voltage or input source before the com- parator output is to have a valid level ...
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... TRISB — — (2) N/A TRISC — — (1) N/A TRISGPIO — — Legend Unknown Unchanged, – = Unimplemented, read as ‘0’ Depends on condition. Note 1: PIC12F510 only. 2: PIC16F506 only. DS41268B-page 0. LEAKAGE V = 0.6V T ±500 Input Capacitance = Threshold Voltage = Leakage Current at the Pin = Interconnect Resistance = Source Impedance ...
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... Equation 8-1 determines the output voltages: EQUATION 8-1: VRR = 1 (low range (VR3:VR0/24 REF VRR = 0 (high range /4) + (VR3:VR0 x V REF DD REGISTER 8-1: VRCON: PIC16F506 ONLY (ADDRESS: 0Ch) R/W-0 R/W-0 VREN VROE bit 7 bit 7 VREN: CV REF powered on REF ...
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... Bit 6 0Ch VRCON VREN VROE (1) 08h CM1CON0 C1OUT C1OUTEN (1) 0Bh CM2CON0 C2OUT C2OUTEN Legend unknown unchanged, – = unimplemented, read as ‘0’. Note 1: PIC16F506 only. DS41268B-page 50 16 Stages MUX V REN VR3:VR0 = ‘0000’ VRR Bit 5 Bit 4 Bit 3 Bit 2 VRR — VR3 VR2 ...
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... ANS<1:0> bits. When the ADC is on (ADON = 1) and a channel is selected that is also being used by the comparator, then both the comparator and the ADC will see the analog voltage on the pin. © 2006 Microchip Technology Inc. PIC12F510/16F506 Note the users responsibility to ensure that ...
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... Sleep Wake Reset DS41268B-page 52 16 500 8 MHz 4 MHz 1 MHz MHz kHz — — — . ADCS1 ADCS0 CHS1 Preliminary 350 200 100 32 kHz kHz kHz kHz — — — — 125 250 160 s 500 s CHS0 GO/DONE ADON © 2006 Microchip Technology Inc. ...
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... ADC module is operating 0 = ADC module is shut-off and consumes no power Note 1: On the PIC16F506, the term is RBx, on PIC12F510, the term is GPx. 2: When the ANS bits are set, the channels selected will automatically be forced into Analog mode, regardless of the pin function previously defined. The only exception to this is the com- parator, where the analog input to the comparator and the ADC will be active at the same time ...
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... R-X ADRES1 ADRES0 bit Bit is unknown ;configure A/D ;start conversion ;setup for read of ;channel 1 ;read result ;save result ;start conversion ;setup for read of ;channel 2 ;read result ;save result ;start conversion ;read result ;save result ;optional: returns © 2006 Microchip Technology Inc. ...
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... The PIC12F510/16F506 devices have a Watchdog Timer, which can be shut off only through Configuration bit WDTE. It runs off of its own RC oscillator for added reliability. If using HS (PIC16F506 selectable oscillator options, there is always a delay, provided by the Device Reset Timer (DRT), intended to keep the chip in Reset until the crystal oscillator is stable. If using INTOSC, EXTRC or EC there ...
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... R = Readable bit -n = Value at POR DS41268B-page 56 — — IOSCFS MCLRE DD (1), (2) (1), ( Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = bit is set ‘0’ = bit is cleared Preliminary CP WDTE FOSC1 FOSC0 bit 0 rise time and bit is unknown © 2006 Microchip Technology Inc. ...
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... EXTRC with RB4 function on RB4/OSC2/CLKOUT and 1.125 ms DRT 111 = EXTRC with CLKOUT function on RB4/OSC2/CLKOUT and 1.125 ms DRT Note 1: Refer to the “PIC16F506 Memory Programming Specification”, DS41258, to determine how to access the Configuration Word the responsibility of the application designer to ensure the use of the 1.125 ms (nominal) DRT will result in acceptable operation ...
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... Use of a series cut crystal may give a fre- quency out of the crystal manufacturers specifications. When in HS (PIC16F506 modes, the device can have an external clock source drive the (GP5/ RB5)/OSC1/CLKIN pin (Figure 10-2). ...
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... Since each crystal has its own characteristics, the user should con- sult the crystal manufacturer for appropri- ate values of external components. 3: PIC16F506 only. 10.2.3 EXTERNAL CRYSTAL OSCILLATOR CIRCUIT Either a prepackaged oscillator or a simple oscillator circuit with TTL gates can be used as an external crystal oscillator circuit ...
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... AC/DC timing requirements listed in Section 10.6 “Watchdog Timer (WDT)”. Figure 10-6 below shows how an external clock circuit should be configured. DS41268B-page 60 FIGURE 10-6: PIC16F506: EC, HS, XT, LP Clock From ext. system OSC2/CLKOUT/RB4 PIC12F510: XT, LP Clock From ext. system ...
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... Legend unchanged unknown, – = unimplemented bit, read as ‘0’ value depends on condition. Note 1: Bits <7:2> register contain oscillator calibration values due to MOVLW XX instruction at top of memory. 2: See Table 10-5 for Reset value for specific conditions. © 2006 Microchip Technology Inc. PIC12F510/16F506 MCLR Reset, WDT Time-out, Power-on Reset Wake-up On Pin Change, Wake-up on Comparator Change ...
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... PIC12F510/16F506 TABLE 10-4: RESET CONDITIONS FOR REGISTERS – PIC16F506 Register Address W — INDF 00h TMR0 01h PCL 02h STATUS 03h FSR 04h OSCCAL 05h PORTB 06h PORTC 07h CM1CON0 08h ADCON0 09h ADRES 0Ah CM2CON0 0Bh VRCON 0Ch OPTION — TRISB — ...
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... If these conditions are not met, the devices must be held in Reset until the operating parameters are met. © 2006 Microchip Technology Inc. PIC12F510/16F506 A simplified block diagram of the on-chip Power-on Reset circuit is shown in Figure 10-8. The Power-on Reset circuit and the Device Reset Timer (see Section 10.5 “ ...
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... Internal Reset FIGURE 10-10: TIME-OUT SEQUENCE ON POWER-UP (MCLR TIED TO V TIME V DD MCLR Internal POR DRT Time-out Internal Reset DS41268B-page 64 POR (Power-on Reset) MCLR Reset Start-up Timer (10 ms, 1.125 ms) TDRT Preliminary CHIP Reset TDRT ): FAST V RISE DD DD © 2006 Microchip Technology Inc. ...
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... V DD MCLR Internal POR DRT Time-out Internal Reset Note: When V rises slowly, the T DD value. In this example, the chip will reset properly if, and only if, V1 © 2006 Microchip Technology Inc. PIC12F510/16F506 V1 TDRT time-out expires long before V DRT DD Preliminary ): SLOW V RISE DD DD ...
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... Oscillator Configuration LP XT (1) HS (1) EC INTOSC EXTRC Note 1: PIC16F506 only MCLR) level. Note the responsibility of the application as MCLR and designer to ensure the use of the 1.125 ms nominal DRT will result in acceptable operation. Refer to Electrical Specifications for V stability requirements for this mode of operation. ...
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... Bit 6 (1) N/A OPTION GPWU GPPU T0CS (2) N/A OPTION RBWU RBPU Legend: Shaded boxes = Not used by Watchdog Timer. – = unimplemented, read as ‘0’ unchanged. Note 1: PIC12F510 only. 2: PIC16F506 only. © 2006 Microchip Technology Inc. PIC12F510/16F506 0 M Postscaler Postscaler 8-to-1 MUX PSA To Timer0 0 1 ...
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... Microchip Technology’s MCP809 microcon- troller supervisor. There are 7 different trip point selections to accommodate systems. goes DD Preliminary BROWN-OUT PROTECTION CIRCUIT PIC12F510 PIC16F506 Q1 (2) MCLR (1) 40k is below a certain level such 0. BROWN-OUT PROTECTION CIRCUIT Bypass MCLR PIC12F510 PIC16F506 © 2006 Microchip Technology Inc. ...
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... If a wake-up on change occurs and the pins are not read before reentering Sleep, a wake-up will occur immediately even if no pins change while in Sleep mode. © 2006 Microchip Technology Inc. PIC12F510/16F506 Note 1: Caution: Right before entering Sleep, read register(s) CM1CON0 and CM2CON0. ...
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... A typical In-Circuit Serial Programming connection is shown in Figure 10-16. DS41268B-page 70 FIGURE 10-16: External Connector Signals + CLK (see program- Data I/O becomes the Preliminary TYPICAL IN-CIRCUIT SERIAL PROGRAMMING CONNECTION To Normal Connections PIC12F510 PIC16F506 MCLR/V PP GP1/RB1 GP0/RB0 Normal Connections © 2006 Microchip Technology Inc. ...
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... Assigned to Register bit field < > In the set of italics User defined term (font is courier) © 2006 Microchip Technology Inc. PIC12F510/16F506 All instructions are executed within a single instruction cycle, unless a conditional test is true or the program counter is changed as a result of an instruction. In this case, the execution takes two instruction cycles. One instruction cycle consists of four oscillator periods ...
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... Preliminary © 2006 Microchip Technology Inc. Status Notes Affected LSb C, DC ffff ffff Z 4 ffff Z 0000 Z ffff ffff None 2, 4 ffff ffff None ...
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... The contents of the W register are AND’ed with register ‘f’. If ‘d’ is ‘0’, the result is stored in the W regis- ter. If ‘d’ is ‘1’, the result is stored back in register ‘f’. © 2006 Microchip Technology Inc. PIC12F510/16F506 BCF Bit Clear f Syntax: ...
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... WDT and not Timer0. Status bits TO and PD are set. Complement f [ label ] COMF f [0,1] (f) (dest) The contents of register ‘f’ are complemented. If ‘d’ is ‘0’, the result is stored in the W register. If ‘d’ is ‘1’, the result is stored back in register ‘f’. © 2006 Microchip Technology Inc. ...
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... Status Affected: None Description: GOTO is an unconditional branch. The 9-bit immediate value is loaded into PC bits <8:0>. The upper bits of PC are loaded from STATUS <6:5>. GOTO is a two- cycle instruction. © 2006 Microchip Technology Inc. PIC12F510/16F506 INCF Increment f Syntax: [ label ] Operands: 0 ...
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... Operands: None Operation: No operation Status Affected: None Description: No operation. OPTION Load OPTION Register Syntax: [ label ] Operands: None Operation: (W) Status Affected: None Description: The content of the W register is loaded into the OPTION register. Preliminary © 2006 Microchip Technology Inc. MOVWF f NOP Option Option ...
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... Carry flag. If ‘d’ is ‘0’, the result is placed in the W register. If ‘d’ is ‘1’, the result is placed back in register ‘f’. register ‘f’ C © 2006 Microchip Technology Inc. PIC12F510/16F506 SLEEP Enter SLEEP Mode Syntax: [label ] Operands: ...
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... Status Affected: Z Description: Exclusive OR the contents of the W register with register ‘f’. If ‘d’ is ‘0’, the result is stored in the W register. If ‘d’ is ‘1’, the result is stored back in register ‘f’. Preliminary © 2006 Microchip Technology Inc. f,d dest) ...
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... PICSTART Plus Development Programmer - MPLAB PM3 Device Programmer • Low-Cost Demonstration and Development Boards and Evaluation Kits © 2006 Microchip Technology Inc. PIC12F510/16F506 12.1 MPLAB Integrated Development Environment Software The MPLAB IDE software brings an ease of software development previously unseen in the 8/16-bit micro- controller market ...
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... MPLAB C18 and MPLAB C30 C Compilers, and the MPASM and MPLAB ASM30 Assemblers. The software simulator offers the flexibility to develop and debug code outside of the laboratory environment, making it an excellent, economical software development tool. Preliminary ® DSCs on an © 2006 Microchip Technology Inc. ...
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... The PC platform and Microsoft Windows 32-bit operating system were chosen to best make these features available in a simple, unified application. © 2006 Microchip Technology Inc. PIC12F510/16F506 12.9 MPLAB ICD 2 In-Circuit Debugger Microchip’s In-Circuit Debugger, MPLAB ICD ...
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... Sigma-Delta ADC, flow rate sensing, plus many more. Check the Microchip web page (www.microchip.com) and the latest “Product Selector Guide” (DS00148) for the complete list of demonstration, development and evaluation kits. Preliminary © 2006 Microchip Technology Inc. ® L security ICs, CAN ® ...
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... This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. © 2006 Microchip Technology Inc. PIC12F510/16F506 ............................................................................... -0. ...
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... PIC12F510/16F506 VOLTAGE-FREQUENCY GRAPH, -40 C FIGURE 13-1: 6.0 5.5 5.0 4 (Volts) 4.0 3.5 3.0 2.5 2 MAXIMUM OSCILLATOR FREQUENCY TABLE (PIC12F510) FIGURE 13- EXTRC INTOSC 0 DS41268B-page Frequency (MHz) 200 kHz 4 MHz 8 MHz Frequency (MHz) Preliminary +125 C (PIC12F510 MHz © 2006 Microchip Technology Inc. ...
Page 87
... VOLTAGE FREQUENCY GRAPH, -40 C FIGURE 13-3: 6.0 5.5 5.0 4 (Volts) 4.0 3.5 3.0 2.5 2 MAXIMUM OSCILLATOR FREQUENCY TABLE (PIC16F506) FIGURE 13- EXTRC INTOSC © 2006 Microchip Technology Inc. PIC12F510/16F506 Frequency (MHz) 200 kHz 4 MHz 8 MHz Frequency (MHz) Preliminary +125 C (PIC16F506 MHz DS41268B-page 85 ...
Page 88
... DD (in EXTRC mode only). The current through the resistor can be EXT EXT Preliminary T +85 C (Industrial) A Conditions ( MHz 2.0V OSC MHz 3.0V OSC MHz 5.0V OSC kHz 2.0V, WDT OSC T0CKI = © 2006 Microchip Technology Inc. ...
Page 89
... The power-down current in Sleep mode does not depend on the oscillator type. Power-down current is measured with the part in Sleep mode, with all I/O pins in high-impedance state and tied to V © 2006 Microchip Technology Inc. PIC12F510/16F506 Standard Operating Conditions (unless otherwise specified) Operating Temperature -40 C ...
Page 90
... – 0.7 — — -1.0 mA — — XT, HS and LP modes when external clock is used to drive OSC1. — — Preliminary © 2006 Microchip Technology Inc. Conditions V 5.5V DD 5.5V DD range PIN Pin at high-impedance PIN DD V PIN XT, HS and LP oscillator PIN DD = 4.5V, – + 4.5V, – ...
Page 91
... V current is from external V REF 4: When A/D is off, it will not consume any current other than leakage current. The power-down current specification includes any such leakage from the A/D module. © 2006 Microchip Technology Inc. PIC12F510/16F506 Min Typ Max Units — ±3 ± ...
Page 92
... V — — — pin, whichever is selected as reference input. REF DD Preliminary Units Conditions bit LSb V = 5.0V DD LSb No missing codes to 8 bits LSb V = 5.0V DD LSb V = 5.0V DD — AIN © 2006 Microchip Technology Inc. ...
Page 93
... I/O port Uppercase letters and their meanings Fall H High I Invalid (High-impedance) L Low FIGURE 13-5: LOAD CONDITIONS Pin FIGURE 13-6: EXTERNAL CLOCK TIMING Q4 OSC1 © 2006 Microchip Technology Inc. PIC12F510/16F506 T Time mc MCLR osc Oscillator os OSC1 t0 T0CKI wdt Watchdog Timer P Period R Rise V Valid ...
Page 94
... XT Oscillator mode ns HS/EC Oscillator mode (PIC16F506 only Oscillator mode ns EXTRC Oscillator mode ns XT Oscillator mode ns HS/EC Oscillator mode (PIC16F506 only Oscillator mode Oscillator s LP Oscillator ns HS/EC Oscillator (PIC16F506 only Oscillator ns LP Oscillator ns HS/EC Oscillator (PIC16F506 only) © 2006 Microchip Technology Inc. ...
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... I/O TIMING Q4 OSC1 I/O Pin (input) I/O Pin Old Value (output) Note: All tests must be done with specified capacitive loads (see data sheet I/O pins and CLKOUT. © 2006 Microchip Technology Inc. PIC12F510/16F506 Standard Operating Conditions (unless otherwise specified) Operating Temperature - - Freq ...
Page 96
... I/O pins must be taken out of High-Impedance mode by enabling the output drivers in software. 2: Runs in MCLR or WDT Reset only in XT, LP and HS modes. DS41268B-page 94 - +85 C (industrial +125 C (extended) A Characteristic Min (2), (3) — TBD (2) TBD (2), (3) — (2), (3) — Preliminary (1) Typ Max Units — 100* ns — — ns — — 25 25 © 2006 Microchip Technology Inc. ...
Page 97
... These parameters are characterized but not tested. Note 1: Data in the Typical (“Typ”) column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. © 2006 Microchip Technology Inc. PIC12F510/16F506 Standard Operating Conditions (unless otherwise specified) Operating Temperature -40 C ...
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... PIC12F510/16F506 14.0 DC AND AC CHARACTERISTICS GRAPHS AND CHARTS Graphs and charts are not available at this time. DS41268B-page 96 Preliminary © 2006 Microchip Technology Inc. ...
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... NOTES: © 2006 Microchip Technology Inc. PIC12F510/16F506 Preliminary DS41268B-page 97 ...
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... For PICmicro device marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price. DS41268B-page 98 Example 12F510/P 017 0410 Example PIC16F506-I/P 0410017 Example PIC12F510-I /SN0410 017 Preliminary © 2006 Microchip Technology Inc. ...
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... Package Marking Information (Cont’d) 14-Lead SOIC (.150”) XXXXXXXXXXX XXXXXXXXXXX YYWWNNN 8-Lead MSOP XXXXXX YWWNNN 14-Lead TSSOP XXXXXXXX YYWW NNN © 2006 Microchip Technology Inc. PIC12F510/16F506 Example PIC16F506 -I/SL 0410017 Example 602/MS 310017 Example 16F506/ST Preliminary 0410 017 DS41268B-page 99 ...
Page 102
... L p MILLIMETERS MIN NOM MAX 8 2.54 3.56 3.94 4.32 2.92 3.30 3.68 0.38 7.62 7.94 8.26 6.10 6.35 6.60 9.14 9.46 9.78 3.18 3.30 3.43 0.20 0.29 0.38 1.14 1.46 1.78 0.36 0.46 0.56 7.87 9.40 10. © 2006 Microchip Technology Inc. ...
Page 103
... Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-005 © 2006 Microchip Technology Inc. PIC12F510/16F506 ...
Page 104
... Preliminary A2 NOM MAX 8 1.27 1.55 1.75 1.42 1.55 0.18 0.25 6.02 6.20 3.91 3.99 4.90 5.00 0.38 0.51 0.62 0. 0.23 0.25 0.42 0. © 2006 Microchip Technology Inc. ...
Page 105
... Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-065 © 2006 Microchip Technology Inc. PIC12F510/16F506 ...
Page 106
... Preliminary A2 MILLIMETERS* MIN NOM MAX 8 0.65 BSC - - 1.10 0.75 0.85 0.95 0.00 - 0.15 4.90 BSC 3.00 BSC 3.00 BSC 0.40 0.60 0.80 0.95 REF 0° - 8° 0.08 - 0.23 0.22 - 0.40 5° - 15° 5° - 15° Revised 07-21-05 © 2006 Microchip Technology Inc. ...
Page 107
... Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .005" (0.127mm) per side. BSC: Basic Dimension. Theoretically exact value shown without tolerances. See ASME Y14.5M REF: Reference Dimension, usually without tolerance, for information purposes only. See ASME Y14.5M JEDEC Equivalent: MO-153 AB-1 Drawing No. C04-087 © 2006 Microchip Technology Inc. PIC12F510/16F506 ...
Page 108
... Section 10.2.5, Section 10.3, Table 10-3, Table 10-4, Table 10-5, Section 10.4, Section 10.5, Section 10.6.1, Section 10.9, 10.9.1, 10.9.2, Section 10.11. Section 13.0 – 13.1 DC Characteristics, 13.2 DC Characteristics, Table 13-1, Table 13-3, Table 13-4. DS41268B-page 106 Preliminary © 2006 Microchip Technology Inc. ...
Page 109
... INDEX A ALU ....................................................................................... 9 Assembler MPASM Assembler..................................................... 80 B Block Diagram Comparator for the PIC12F510................................... 46 Comparator for the PIC16F506................................... 46 On-Chip Reset Circuit ................................................. 64 Timer0......................................................................... 39 TMR0/WDT Prescaler................................................. 42 Watchdog Timer.......................................................... 67 Brown-Out Protection Circuit .............................................. Compilers MPLAB C18 ................................................................ 80 MPLAB C30 ................................................................ 80 Carry ..................................................................................... 9 Clocking Scheme ................................................................ 14 Code Protection ............................................................ 55, 69 Configuration Bits................................................................ 55 Configuration Word (PIC12F510) ....................................... 56 Configuration Word (PIC16F506) ...
Page 110
... PIC12F510/16F506 Timing Parameter Symbology and Load Conditions........... 91 TRIS Registers.................................................................... 27 W Wake-up from Sleep ........................................................... 69 Watchdog Timer (WDT) ................................................ 55, 66 Period.......................................................................... 66 Programming Considerations ..................................... 66 WWW Address.................................................................. 108 WWW, On-Line Support........................................................ 3 Z Zero bit .................................................................................. 9 DS41268B-page 108 Preliminary © 2006 Microchip Technology Inc. ...
Page 111
... To register, access the Microchip web site at www.microchip.com, click on Customer Change Notification and follow the registration instructions. © 2006 Microchip Technology Inc. PIC12F510/16F506 CUSTOMER SUPPORT Users of Microchip products can receive assistance through several channels: • ...
Page 112
... What deletions from the document could be made without affecting the overall usefulness there any incorrect or misleading information (what and where)? 7. How would you improve this document? DS41268B-page 110 Total Pages Sent ________ FAX: (______) _________ - _________ N Literature Number: DS41268B Preliminary © 2006 Microchip Technology Inc. ...
Page 113
... PLCC SO = SOIC SP = Skinny Plastic DIP P = PDIP Pattern: QTP, SQTP, Code or Special Requirements (blank otherwise) © 2006 Microchip Technology Inc. PIC12F510/16F506 XXX Examples: Pattern a) PIC18LF258 - I/L 301 = Industrial temp., PLCC package, Extended V #301. b) PIC18LF458 - I/PT = Industrial temp., TQFP package, Extended V (1) (2) , PIC18F248/258T ...
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... Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2006 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-399 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...