PIC16CE624-04/P Microchip Technology, PIC16CE624-04/P Datasheet - Page 69

• Manufacturer Part Number: PIC16CE624-04/P
• Description: IC MCU OTP 1KX14 EE COMP 18DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16CE624-04/P

• Core Size: 8-Bit
• Program Memory Size: 1.75KB (1K x 14)
• Oscillator Type: External
• Core Processor: PIC
• Speed: 4MHz
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 13
• Program Memory Type: OTP
• Eeprom Size: 128 x 8
• Ram Size: 96 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 18-DIP (0.300", 7.62mm)
• Controller Family/series: PIC16C
• No. Of I/o's: 13
• Eeprom Memory Size: 128Byte
• Ram Memory Size: 96Byte
• Cpu Speed: 4MHz
• No. Of: RoHS Compliant
• Processor Series: PIC16C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 96 B
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 13
• Number Of Timers: 1
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 309-1059 - ADAPTER 18 ZIF BD W/18SO PLUGSDVA16XP180 - ADAPTER DEVICE FOR MPLAB-ICEAC164010 - MODULE SKT PROMATEII DIP/SOIC
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

BTFSS
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
CALL
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
1999 Microchip Technology Inc.
Bit Test f, Skip if Set
[ label ] BTFSS f,b
0
0
skip if (f<b>) = 1
None
If bit ’b’ in register ’f’ is ’1’ then the next
instruction is skipped.
If bit ’b’ is ’1’, then the next instruction
fetched during the current instruction
execution, is discarded and a NOP is
executed instead, making this a
two-cycle instruction.
1
1(2)
Before Instruction
After Instruction
Call Subroutine
[ label ] CALL k
0
(PC)+ 1
k
(PCLATH<4:3>)
None
Call Subroutine. First, return address
(PC+1) is pushed onto the stack. The
eleven bit immediate address is
loaded into PC bits <10:0>. The upper
bits of the PC are loaded from
PCLATH. CALL is a two-cycle instruc-
tion.
1
2
Before Instruction
After Instruction
HERE
FALSE
TRUE
HERE
01
10
f
b < 7
k
PC<10:0>,
127
2047
PC =
if FLAG<1> = 0,
PC =
if FLAG<1> = 1,
PC =
PC = Address HERE
PC = Address THERE
TOS = Address HERE+1
TOS,
11bb
BTFSS
GOTO
•
•
•
0kkk
CALL
address HERE
address FALSE
address TRUE
THERE
FLAG,1
PROCESS_CODE
kkkk
PC<12:11>
bfff
kkkk
ffff
CLRF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
CLRW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
Clear f
[ label ] CLRF
0
00h
1
Z
The contents of register ’f’ are cleared
and the Z bit is set.
1
1
Before Instruction
After Instruction
Clear W
[ label ] CLRW
None
00h
1
Z
W register is cleared. Zero bit (Z) is
set.
1
1
Before Instruction
After Instruction
CLRF
CLRW
PIC16CE62X
00
00
f
Z
Z
127
(f)
(W)
FLAG_REG
FLAG_REG
Z
W
W
Z
0001
0001
FLAG_REG
=
=
=
f
DS40182C-page 69
0x5A
0x00
1
1fff
0000
=
=
=
0x5A
0x00
1
ffff
0011