R5F212H1SDSP#U0 Renesas Electronics America, R5F212H1SDSP#U0 Datasheet - Page 18

IC R8C/2H MCU FLASH 4K 20-SSOP

R5F212H1SDSP#U0

Manufacturer Part Number
R5F212H1SDSP#U0
Description
IC R8C/2H MCU FLASH 4K 20-SSOP
Manufacturer
Renesas Electronics America
Series
R8C/2x/2Hr
Datasheet

Specifications of R5F212H1SDSP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
8MHz
Connectivity
LIN, SIO, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
15
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
R8C/2H Group, R8C/2J Group
Rev.1.00
REJ03B0217-0100
2.8.7
2.8.8
2.8.9
2.8.10
The I flag enables maskable interrupts.
Interrupt are disabled when the I flag is set to 0, and are enabled when the I flag is set to 1. The I flag is set to 0
when an interrupt request is acknowledged.
ISP is selected when the U flag is set to 0; USP is selected when the U flag is set to 1.
The U flag is set to 0 when a hardware interrupt request is acknowledged or the INT instruction of software
interrupt numbers 0 to 31 is executed.
IPL is 3 bits wide and assigns processor interrupt priority levels from level 0 to level 7.
If a requested interrupt has higher priority than IPL, the interrupt is enabled.
If necessary, set to 0. When read, the content is undefined.
Mar 28, 2008
Interrupt Enable Flag (I)
Stack Pointer Select Flag (U)
Processor Interrupt Priority Level (IPL)
Reserved Bit
Page 16 of 65
2. Central Processing Unit (CPU)

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