MC908JL16CPE Freescale Semiconductor, MC908JL16CPE Datasheet - Page 59

• Manufacturer Part Number: MC908JL16CPE
• Description: IC MCU 16K FLASH 8MHZ 28-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908JL16CPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SCI
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 23
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.600", 15.24mm)
• Controller Family/series: HC08
• No. Of I/o's: 23
• Ram Memory Size: 512Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Processor Series: HC08JL
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: FSICEBASE, DEMO908JL16E, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: DEMO908JL16E - BOARD DEMO FOR MC908JL16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

4.7 SIM Registers
The SIM has three memory mapped registers.
4.7.1 Break Status Register (BSR)
The break status register contains a flag to indicate that a break caused an exit from stop or wait mode.
SBSW — SIM Break Stop/Wait
Freescale Semiconductor
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•
•
This status bit is useful in applications requiring a return to wait or stop mode after exiting from a break
interrupt. Clear SBSW by writing a logic zero to it. Reset clears SBSW.
INT/BREAK
1 = Stop mode or wait mode was exited by break interrupt
0 = Stop mode or wait mode was not exited by break interrupt
Break Status Register (BSR)
Reset Status Register (RSR)
Break Flag Control Register (BFCR)
ICLK
IAB
Address: $FE00
Reset:
NOTE: Previous data can be operand data or the STOP opcode, depending on the last
Read:
Write:
CPUSTOP
Figure 4-19. Stop Mode Recovery from Interrupt or Break
R/W
IDB
IAB
instruction.
Bit 7
R
R
STOP ADDR
Figure 4-20. Break Status Register (BSR)
STOP +1
= Reserved
Figure 4-18. Stop Mode Entry Timing
R
6
PREVIOUS DATA
MC68HC908JL16 Data Sheet, Rev. 1.1
STOP ADDR + 1
R
5
STOP + 2
STOP RECOVERY PERIOD
NEXT OPCODE
R
4
STOP + 2
1. Writing a clears SBSW.
R
3
SAME
SP
SAME
R
2
SP – 1
Note
SBSW
SAME
1
0
(1)
SAME
SP – 2
Bit 0
R
SIM Registers
SP – 3
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