MC908AZ60AMFUE Freescale Semiconductor, MC908AZ60AMFUE Datasheet - Page 93

IC MCU FLASH 8.4MHZ 60K 64QFP

MC908AZ60AMFUE

Manufacturer Part Number
MC908AZ60AMFUE
Description
IC MCU FLASH 8.4MHZ 60K 64QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908AZ60AMFUE

Core Processor
HC08
Core Size
8-Bit
Speed
8.4MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
52
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 15x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
64-QFP
Processor Series
HC08AZ
Core
HC08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SCI, SPI
Maximum Clock Frequency
8.4 MHz
Number Of Programmable I/os
52
Number Of Timers
8
Operating Supply Voltage
5 V to 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05CE, ZK-HC08AX-A, M68EM08AS/AZ60AE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 15 Channel
Package
64PQFP
Family Name
HC08
Maximum Speed
8.4 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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AUTO — Automatic Termination of Program/Erase Cycle
EEPGM — EEPROM-2 Program/Erase Enable
7.5.2 EEPROM-2 Array Configuration Register
The EEPROM-2 array configuration register configures EEPROM-2 security and EEPROM-2 block
protection.
This read-only register is loaded with the contents of the EEPROM-2 nonvolatile register (EE2NVR) after
a reset.
Bit 7:5 — Unused Bits
EEPRTCT — EEPROM-2 Protection Bit
Freescale Semiconductor
When AUTO is set, EEPGM is cleared automatically after the program/erase cycle is terminated by
the internal timer.
(See note D for
Memory
This read/write bit enables the internal charge pump and applies the programming/erasing voltage to
the EEPROM-2 array if the EELAT bit is set and a write to a valid EEPROM-2 location has occurred.
Reset clears the EEPGM bit.
These read/write bits are software programmable but have no functionality.
The EEPRTCT bit is used to enable the security feature in the EEPROM (see EEPROM-2
Program/Erase Protection).
This feature is a write-once feature. Once the protection is enabled it may not be disabled.
1 = Automatic clear of EEPGM is enabled
0 = Automatic clear of EEPGM is disabled
1 = EEPROM-2 programming/erasing power switched on
0 = EEPROM-2 programming/erasing power switched off
1 = EEPROM-2 security disabled
0 = EEPROM-2 security enabled
Characteristics)
Address:
Writing logic 0s to both the EELAT and EEPGM bits with a single instruction
will clear EEPGM only to allow time for the removal of high voltage.
Reset:
Read: UNUSED
Write:
MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6
7.4.5.2 EEPROM-2
Figure 7-3. EEPROM-2 Array Configuration Register (EE2ACR)
$FF7F
Bit 7
= Unimplemented
UNUSED
6
Programming,
UNUSED
5
Contents of EE2NVR ($FF7C)
EEPRTCT
NOTE
4
7.4.5.3 EEPROM-2
EEBP3
3
EEBP2
2
Erasing, and
EEPROM-2 Register Descriptions
EEBP1
1
EEBP0
28.1.13 EEPROM
Bit 0
93

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