M3087BFLAGP#U3 Renesas Electronics America, M3087BFLAGP#U3 Datasheet - Page 166

• Manufacturer Part Number: M3087BFLAGP#U3
• Description: IC M32C/87B MCU FLASH 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M32C/80r

Specifications of M3087BFLAGP#U3

• Core Processor: M32C/80
• Core Size: 16/32-Bit
• Speed: 32MHz
• Connectivity: CAN, EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• For Use With: R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 142 of 587
Figure 13.3
b23
b23
DMAi SFR Address Register (i = 0 to 3)
DMAi Memory Address Register (i = 0 to 3)
NOTES:
NOTES:
b16 b15
b16 b15
1. When the RWk bit (k = 0 to 3) in the DMDj register (j = 0, 1) is set to 0 (fixed address to incremented address), a destination
2. Use the LDC instruction to set registers DMA0 and DMA1.
3. To set the DMA2 register, set the B flag in the FLG register to 1 (register bank 1) and write to the A0 register.
4. To set the DMA3 register, set the B flag to 1 and write to the A1 register.
1. When the RWk bit (k = 0 to 3) in the DMDj register (j = 0, 1) is set to 0 (fixed address to incremented address), a source address
2. Use the LDC instruction to set registers DSA0 and DSA1.
3. To set the DSA2 register, set the B flag in the FLG register to 1 (register bank 1) and write to the SB register using the LDC
4. To set the DSA3 register, set the B flag to 1 and write to the FB register using the LDC instruction.
address is selected. When the RWk bit is set to 1 (incremented address to fixed address), a source address is selected.
is selected. When the RWk bit is set to 1 (incremented address to fixed address), a destination address is selected.
instruction.
b8 b7
b8 b7
DMA0 to DMA3 Registers, DSA0 to DSA3 Registers
b0
b0
Set an incremented source address or incremented destination
address
Set a fixed source address or fixed destination address
Symbol
Symbol
DMA0
DMA1
DMA2 (bank1:A0)
DMA3 (bank1:A1)
DSA0
DSA1
DSA2 (bank1:SB)
DSA3 (bank1:FB)
(1)
(2)
(2)
(2)
(2)
(4)
(3)
(3)
(4)
Function
Function
Address
(CPU internal register)
(CPU internal register)
(CPU internal register)
(CPU internal register)
Address
(CPU internal register)
(CPU internal register)
(CPU internal register)
(CPU internal register)
(1)
000000h to FFFFFFh
000000h to FFFFFFh
Setting Range
Setting Range
(16 Mbytes)
(16 Mbytes)
After Reset
XXXXXXh
XXXXXXh
000000h
000000h
After Reset
XXXXXXh
XXXXXXh
000000h
000000h
RW
RW
RW
RW
13. DMAC