M3087BFLAGP#U3 Renesas Electronics America, M3087BFLAGP#U3 Datasheet - Page 474

IC M32C/87B MCU FLASH 144LQFP

M3087BFLAGP#U3

Manufacturer Part Number
M3087BFLAGP#U3
Description
IC M32C/87B MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet

Specifications of M3087BFLAGP#U3

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
CAN, EBI/EMI, I²C, IEBus, IrDA, SIO, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
121
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 34x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
For Use With
R0K330879S001BE - KIT DEV RSK M32C/87R0K330879S000BE - KIT DEV RSK M32C/87
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M3087BFLAGP#U3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
M3087BFLAGP#U3M3087BFLAGP#U5
Manufacturer:
Renesas Electronics America
Quantity:
135
Company:
Part Number:
M3087BFLAGP#U3M3087BFLAGP#U5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
M32C/87 Group (M32C/87, M32C/87A, M32C/87B)
REJ09B0180-0151 Rev.1.51 Jul 31, 2008
Page 450 of 587
Figure 23.38
23.3.2
CAN bus
TRMREQ bit
TRMACTIVE bit
TRMSTATE bit
SENTDATA bit
TRMSUCC bit
SISj bit
j = 0 to 15
Figure 23.38 shows an operation example when the CAN transmits a data frame or remote frame.
(1) When the TRMREQ bit in the CiMCTLj register (i = 0, 1; j = 0 to 15) is set to 1 (transmit operation
(2) After a CAN transmit operation is completed, the SENTDATA bit in the CiMCTLj register becomes 1
CAN Transmit Timing
requested) while the CAN bus is in an idle state, the TRMACTIVE bit in the CiMCTLj register
becomes 1 (transmitting), the TRMSTATE bit in the CiSTR register becomes 1 (transmitting), and a
CAN transmit operation is started.
(transmit operation completed), the TRMSUCC bit in the CiSTR register becomes 1 (transmit operation
completed), and the SISj bit in the CiSISTR register becomes 1 (interrupt requested).
Example of CAN Data Frame Transmit Operation
1
0
1
0
1
0
1
0
1
0
1
0
Bus-idle
Transmit operation
started
(1)
Set to 1 by a program
Transmit frame
Transmit frame
Transmit operation
completed
(2)
Set to 0 by a program
Intermission field
Set to 0 by a program
Bus-idle
23. CAN Module

Related parts for M3087BFLAGP#U3