ATTINY24A-MUR Atmel, ATTINY24A-MUR Datasheet - Page 107

• Manufacturer Part Number: ATTINY24A-MUR
• Description: MCU AVR 2KB FLASH 20MHZ 20QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY24A-MUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 12
• Program Memory Size: 2KB (1K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8183C–AVR–03/11
Table 12-2
CTC mode (non-PWM).
Table 12-2.
Table 12-3
Table 12-3.
Note:
Table 12-4
phase and frequency correct PWM mode.
Table 12-4.
Note:
COM1A1
COM1B1
COM1A1
COM1B1
COM1A1
COM1B1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR1A/OCR1B equals TOP and COM1A1/COM1B1 is set. In
0
0
1
1
1. A special case occurs when OCR1A/OCR1B equals TOP and COM1A1/COM1B1 is set.
shows COM1x[1:0] bit functionality when WGM1[3:0] bits are set to fast PWM mode.
this case the compare match is ignored, but the set or clear is done at BOTTOM. See
PWM Mode” on page 95
shows COM1x[1:0] bit functionality when WGM1[3:0] bits are set to phase correct or
“Phase Correct PWM Mode” on page 97
shows COM1x[1:0] bit functionality when WGM1[3:0] bits are set to a Normal or a
Compare Output Mode, non-PWM
Compare Output Mode, Fast PWM
Compare Output Mode, Phase Correct and Phase & Frequency Correct PWM
COM1A0
COM1B0
COM1A0
COM1B0
COM1A0
COM1B0
0
1
0
1
0
1
0
1
0
1
0
1
for more details.
Description
Normal port operation, OC1A/OC1B disconnected
Toggle OC1A/OC1B on Compare Match
Clear OC1A/OC1B on Compare Match
(Set output to low level)
Set OC1A/OC1B on Compare Match
(Set output to high level).
Description
Normal port operation, OC1A/OC1B disconnected
WGM13=0: Normal port operation, OC1A/OC1B disconnected
WGM13=1: Toggle OC1A on Compare Match, OC1B reserved
Clear OC1A/OC1B on Compare Match, set OC1A/OC1B at
BOTTOM (non-inverting mode)
Set OC1A/OC1B on Compare Match, clear OC1A/OC1B at
BOTTOM (inverting mode)
Description
Normal port operation, OC1A/OC1B disconnected
WGM13=0: Normal port operation, OC1A/OC1B disconnected
WGM13=1: Toggle OC1A on Compare Match, OC1B reserved
Clear OC1A/OC1B on Compare Match when up-counting
Set OC1A/OC1B on Compare Match when downcounting
Set OC1A/OC1B on Compare Match when up-counting
Clear OC1A/OC1B on Compare Match when downcounting
for more details.
(1)
ATtiny24A/44A/84A
“Fast
107
(1)