PIC16F57-I/SP Microchip Technology, PIC16F57-I/SP Datasheet - Page 38
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PIC16F57-I/SP
Manufacturer Part Number
PIC16F57-I/SP
Description
IC MCU FLASH 2KX12 28-DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F54-ISS.pdf
(88 pages)
2.PIC16F57-ISS.pdf
(16 pages)
3.PIC16F57-ISO.pdf
(86 pages)
Specifications of PIC16F57-I/SP
Program Memory Type
FLASH
Program Memory Size
3KB (2K x 12)
Package / Case
28-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
20
Ram Size
72 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
72 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
20
Number Of Timers
1
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
DV164120, DV164101, ICE2000
Minimum Operating Temperature
- 40 C
Data Rom Size
2 K
Height
3.3 mm
Length
34.67 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Width
7.24 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164001 - MODULE SKT PROMATEII 18/28DIP
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
PIC16F5X
8.2
The Watchdog Timer (WDT) is a free running on-chip
RC oscillator which does not require any external
components. This RC oscillator is separate from the
RC oscillator of the OSC1/CLKIN pin. That means that
the WDT will run even if the clock on the OSC1/CLKIN
and OSC2/CLKOUT pins have been stopped, for
example, by execution of a SLEEP instruction. During
normal operation or Sleep, a WDT Reset or Wake-up
Reset generates a device Reset.
The TO bit (Status<4>) will be cleared upon a
Watchdog
Register”).
The WDT can be permanently disabled by program-
ming the configuration bit WDTE as a ‘0’ (Section 8.1
“Configuration Bits”). Refer to the PIC16F54 and
PIC16F57 Programming Specifications to determine
how to access the configuration word. These
documents can be found on the Microchip web site at
www.microchip.com.
8.2.1
An 8-bit counter is available as a prescaler for the
Timer0 module (Section 7.2 “Prescaler”), or as a
postscaler for the Watchdog Timer (WDT), respec-
tively. For simplicity, this counter is being referred to as
“prescaler” throughout this data sheet.
The PSA and PS<2:0> bits (Option<3:0>) determine
prescaler assignment and prescale ratio (Section 3.4
“Option Register”).
TABLE 8-1:
DS41213B-page 36
N/A
Legend: Shaded cells not used by Watchdog Timer, - = unimplemented, read as ‘0’, u = unchanged
Address
Note:
Watchdog Timer (WDT)
WDT PERIOD
The prescaler may be used by either the
Timer0 module or the WDT, but not both.
Thus, a prescaler assignment for the
Timer0 module means that there is no
prescaler for the WDT, and vice versa.
OPTION
Timer
Name
SUMMARY OF REGISTERS ASSOCIATED WITH THE WATCHDOG TIMER
Reset
Bit 7
—
(Section 3.3
Bit 6
—
TOCS TOSE
Bit 5
“Status
Preliminary
Bit 4
Bit 3
PSA
The WDT has a nominal time-out period of 18 ms (with
no prescaler). If a longer time-out period is desired, a
prescaler with a division ratio of up to 1:128 can be
assigned to the WDT (under software control) by
writing to the Option register. Thus time-out, a period of
a nominal 2.3 seconds, can be realized. These periods
vary with temperature, V
variations (see Device Characterization).
Under worst case conditions (V
= Max., WDT prescaler = 1:128), it may take several
seconds before a WDT time-out occurs.
8.2.2
The CLRWDT instruction clears the WDT and the
prescaler, if assigned to the WDT, and prevents it from
timing out and generating a device Reset.
The SLEEP instruction resets the WDT and the
prescaler, if assigned to the WDT. This gives the
maximum Sleep time before a WDT Wake-up Reset.
FIGURE 8-1:
Note 1:
Watchdog
From TMR0 Clock Source
WDTE
Timer
Bit 2
PS2
WDT PROGRAMMING
CONSIDERATIONS
T0CS, T0SE, PSA, PS2:PS0 are bits in the
Option register.
Bit 1
PS1
0
1
Bit 0
PSA
PS0
WATCHDOG TIMER
BLOCK DIAGRAM
M
U
X
2004 Microchip Technology Inc.
(1)
DD
WDT Time-out
0
--11 1111 --11 1111
and part-to-part process
Power-on
Value on
MUX
Prescaler
DD
Reset
8-to-1
MUX
= Min., Temperature
1
WDT Reset
MCLR and
Value on
PSA
To TMR0
PS2:PS0
(1)
(1)