PIC16F1826-E/P Microchip Technology, PIC16F1826-E/P Datasheet - Page 60

• Manufacturer Part Number: PIC16F1826-E/P
• Description: MCU PIC 8BIT 2K FLASH 18-DIP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1826-E/P

• Core Size: 8-Bit
• Program Memory Size: 3.5KB (2K x 14)
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 18-DIP (0.300", 7.62mm)
• Controller Family/series: PIC16F
• No. Of I/o's: 16
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 32MHz
• No. Of Timers: 3
• Core: PIC
• Processor Series: PIC16F
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 32 MHz
• Data Ram Size: 256 B
• On-chip Adc: Yes
• Number Of Programmable I/os: 15
• Number Of Timers: 3
• Mounting Style: Through Hole
• A/d Bit Size: 10 bit
• A/d Channels Available: 12
• Height: 3.3 mm
• Interface Type: I2C, SPI, UART
• Length: 22.86 mm
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.3 V
• Width: 6.35 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC16F/LF1826/27
5.2.2
The device may be configured to use the internal oscil-
lator block as the system clock by performing one of the
following actions:
• Program the FOSC<2:0> bits in Configuration
• Write the SCS<1:0> bits in the OSCCON register
In INTOSC mode, OSC1/CLKIN is available for general
purpose I/O. OSC2/CLKOUT is available for general
purpose I/O or CLKOUT.
The function of the OSC2/CLKOUT pin is determined
by the state of the CLKOUTEN bit in Configuration
Word 1.
The internal oscillator block has two independent
oscillators and a dedicated Phase-Locked Loop,
HFPLL that can produce one of three internal system
clock sources.
1.
2.
3.
DS41391C-page 60
Word 1 to select the INTOSC clock source, which
will be used as the default system clock upon a
device Reset.
to switch the system clock source to the internal
oscillator during run-time. See Section 5.3
“Clock Switching”for more information.
The
Oscillator) is factory calibrated and operates at
16 MHz. The HFINTOSC source is generated
from the 500 kHz MFINTOSC source and the
dedicated Phase-Locked Loop, HFPLL. The
frequency
user-adjusted via software using the OSCTUNE
register (Register 5-3).
The MFINTOSC (Medium-Frequency Internal
Oscillator) is factory calibrated and operates at
500 kHz. The frequency of the MFINTOSC can
be
OSCTUNE register (Register 5-3).
The
Oscillator) is uncalibrated and operates at
31 kHz.
user-adjusted
HFINTOSC
LFINTOSC
INTERNAL CLOCK SOURCES
of
the
(High-Frequency
(Low-Frequency
via software using the
HFINTOSC
can
Internal
Internal
be
Preliminary
5.2.2.1
The High-Frequency Internal Oscillator (HFINTOSC) is
a factory calibrated 16 MHz internal clock source. The
frequency of the HFINTOSC can be altered via
software using the OSCTUNE register (Register 5-3).
The output of the HFINTOSC connects to a postscaler
and multiplexer (see Figure 5-1). One of nine
frequencies derived from the HFINTOSC can be
selected via software using the IRCF<3:0> bits of the
OSCCON register. See Section 5.2.2.7 “Internal
Oscillator Clock Switch Timing” for more information.
The HFINTOSC is enabled by:
• Configure the IRCF<3:0> bits of the OSCCON
• FOSC<2:0> = 100, or
• Set the System Clock Source (SCS) bits of the
The High Frequency Internal Oscillator Ready bit
(HFIOFR) of the OSCSTAT register indicates when the
HFINTOSC is running and can be utilized.
The High Frequency Internal Oscillator Status Locked
bit (HFIOFL) of the OSCSTAT register indicates when
the HFINTOSC is running within 2% of its final value.
The High Frequency Internal Oscillator Status Stable
bit (HFIOFS) of the OSCSTAT register indicates when
the HFINTOSC is running within 0.5% of its final value.
5.2.2.2
The
(MFINTOSC) is a factory calibrated 500 kHz internal
clock source. The frequency of the MFINTOSC can be
altered via software using the OSCTUNE register
(Register 5-3).
The output of the MFINTOSC connects to a postscaler
and multiplexer (see Figure 5-1). One of nine
frequencies derived from the MFINTOSC can be
selected via software using the IRCF<3:0> bits of the
OSCCON register. See Section 5.2.2.7 “Internal
Oscillator Clock Switch Timing” for more information.
The MFINTOSC is enabled by:
• Configure the IRCF<3:0> bits of the OSCCON
• FOSC<2:0> = 100, or
• Set the System Clock Source (SCS) bits of the
The Medium Frequency Internal Oscillator Ready bit
(MFIOFR) of the OSCSTAT register indicates when the
MFINTOSC is running and can be utilized.
register for the desired HF frequency, and
OSCCON register to ‘1x’.
register for the desired HF frequency, and
OSCCON register to ‘1x’
Medium-Frequency
HFINTOSC
MFINTOSC
 2010 Microchip Technology Inc.
Internal
Oscillator