ATTINY88-MMU Atmel, ATTINY88-MMU Datasheet - Page 25
ATTINY88-MMU
Manufacturer Part Number
ATTINY88-MMU
Description
MCU AVR 8K FLASH 12MHZ 28-QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY88-MMU
Core Processor
AVR
Core Size
8-Bit
Speed
12MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
24
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Processor Series
ATTINY8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
2-Wire, I2S, SPI
Maximum Clock Frequency
12 MHz
Number Of Programmable I/os
24
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATQT600, ATAVRTS2080B
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
For Use With
ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVR
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATTINY88-MMU
Manufacturer:
ATMEL
Quantity:
2 450
Company:
Part Number:
ATTINY88-MMU
Manufacturer:
ATMEL
Quantity:
201
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5.4
5.4.1
5.4.2
5.4.3
8008G–AVR–04/11
Register Description
EEARH and EEARL – EEPROM Address Register
EEDR – EEPROM Data Register
EECR – EEPROM Control Register
• Bits 15:6 – Res: Reserved Bits
These bits are reserved and will always read zero.
• Bits 5:0 – EEAR[5:0]: EEPROM Address
The EEPROM Address Registers – EEARH and EEARL specify the EEPROM address in the
64/64 bytes EEPROM space. The EEPROM data bytes are addressed linearly between 0 and
63/63. The initial value of EEAR is undefined. A proper value must be written before the
EEPROM may be accessed.
• Bits 7:0 – EEDR[7:0]: EEPROM Data
For the EEPROM write operation, the EEDR Register contains the data to be written to the
EEPROM in the address given by the EEAR Register. For the EEPROM read operation, the
EEDR contains the data read out from the EEPROM at the address given by EEAR.
• Bits 7:6 – Res: Reserved Bits
These bits are reserved and will always read zero.
• Bits 5:4 – EEPM[1:0]: EEPROM Programming Mode Bits
EEPROM programming mode bits define the action that will be triggered when EEPE is written.
Data can be programmed in a single atomic operation, where the previous value is automatically
Bit
0x21 (0x41)
Read/Write
Initial Value
Bit
0x20 (0x40)
Read/Write
Initial Value
Bit
0x1F (0x3F)
Read/Write
Initial Value
MSB
R/W
15
R
R
R
–
–
7
0
0
7
0
7
–
0
R/W
14
R
R
R
–
–
6
0
0
6
0
6
–
0
EEPM1
EEAR5
R/W
R/W
R/W
13
R
5
X
–
5
0
X
5
0
EEPM0
EEAR4
R/W
R/W
R/W
12
X
R
4
–
4
0
X
4
0
EEAR3
EERIE
R/W
R/W
R/W
11
R
3
0
–
3
0
X
3
0
EEMPE
EEAR2
R/W
R/W
R/W
10
R
–
2
0
X
2
0
2
0
EEAR1
EEPE
R/W
R/W
R/W
R
9
–
1
0
X
1
0
X
1
ATtiny48/88
EEAR0
EERE
R/W
LSB
R/W
R/W
R
X
8
–
0
0
0
0
0
0
EEARH
EEARL
EEDR
EECR
25
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