PIC12F635-I/MF Microchip Technology, PIC12F635-I/MF Datasheet - Page 116

• Manufacturer Part Number: PIC12F635-I/MF
• Description: IC MCU FLASH 1KX14 8DFN
• Manufacturer: Microchip Technology
• Series: PIC® 12Fr

Specifications of PIC12F635-I/MF

• Core Size: 8-Bit
• Program Memory Size: 1.75KB (1K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 5
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-DFN
• Controller Family/series: PIC12
• No. Of I/o's: 6
• Eeprom Memory Size: 128Byte
• Ram Memory Size: 64Byte
• Cpu Speed: 20MHz
• No. Of Timers: 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT08DFN2 - SOCKET TRANSITION ICE 14DIP/8DFNAC162057 - MPLAB ICD 2 HEADER 14DIPXLT08DFN - SOCKET TRANSITION ICE 8DFNAC164032 - ADAPTER PICSTART PLUS 8DFN/DIPAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Data Converters: -
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC12F635/PIC16F636/639
11.31.2
When the Carrier Clock output is selected, the LFDATA
output is a square pulse of the input carrier clock and
available as soon as the AGC stabilization time (T
completed. There are two Configuration register options
for the carrier clock output: (a) clock divide-by one or (b)
clock divide-by four, depending on bit DATOUT<7> of
Configuration Register 2 (Register 11-3). The carrier
clock output is available immediately after the AGC
settling time. The Output Enable Filter, AGCSIG, and
MODMIN options are applicable for the carrier clock
output in the same way as the demodulated output. The
input channel can be individually enabled or disabled for
the output. If more than one channel is enabled, the
output is the sum of each output of all enabled channels.
Therefore, the carrier clock output waveform is not as
precise as when only one channel is enabled. It is
recommended to enable one channel only if a precise
output waveform is desired.
There will be no valid output if all three channels are
disabled. See Figure 11-13 for carrier clock output
examples.
Related Configuration register bits:
• Configuration Register 1 (Register 11-2),
• Configuration Register 2 (Register 11-3),
• Configuration Register 0 (Register 11-1): all bits
• Configuration Register 5 (Register 11-6)
DS41232D-page 114
DATOUT <8:7>:
CLKDIV<7>:
are affected
bit 8 bit 7
0
0
1
1
0: Carrier Clock/1
1: Carrier Clock/4
CARRIER CLOCK OUTPUT
0: Demodulator Output
1: Carrier Clock Output
0: RSSI Output
1: RSSI Output
AGC
) is
© 2007 Microchip Technology Inc.