PIC12CE519-04/P Microchip Technology, PIC12CE519-04/P Datasheet - Page 381

• Manufacturer Part Number: PIC12CE519-04/P
• Description: IC MCU OTP 1KX12 W/EE 8DIP
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12CE519-04/P

• Program Memory Type: OTP
• Program Memory Size: 1.5KB (1K x 12)
• Package / Case: 8-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Eeprom Size: 16 x 8
• Ram Size: 41 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Processor Series: PIC12C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 41 B
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 1
• Operating Supply Voltage: 3 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: 0 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMINGDVA12XP080 - ADAPTER DEVICE FOR MPLAB-ICEAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

20.12
1997 Microchip Technology Inc.
Initialization
The code in
of the PIC16C62X devices. RA3 and RA4 are configured as digital output. RA0 and RA1 are con-
figured as the V- inputs and RA2 as the V+ input to both comparators.
Example 20-1:
FLAG_REG
;
CLRF
CLRF
ANDLW
IORWF
MOVLW
MOVWF
BSF
MOVLW
MOVWF
BCF
CALL
MOVF
BCF
BSF
BSF
BCF
BSF
BSF
Example 20-1
EQU
FLAG_REG
PORTA
0xC0
FLAG_REG,F
0x03
CMCON
STATUS,RP0
0x07
TRISA
STATUS,RP0
DELAY 10
CMCON,F
PIR1,CMIF
STATUS,RP0
PIE1,CMIE
STATUS,RP0
INTCON,PEIE
INTCON,GIE
Initializing Comparator Module (PIC16C62X)
0X20
depicts example steps required to configure the comparator module
; Init flag register
; Init PORTA
; Mask comparator bits
; Store bits in flag register
; Init comparator mode
; CM<2:0> = 011
; Select Bank1
; Initialize data direction
; Set RA<2:0> as inputs, RA<4:3> as outputs,
;
; Select Bank0
; 10 s delay
; Read
; Clear pending interrupts
; Select Bank1
; Enable comparator interrupts
; Select Bank0
; Enable peripheral interrupts
; Global interrupt enable
Section 20. Comparator
TRISA<7:5> always read ‘0’
CMCON to end change condition
DS31020A-page 20-11
20