PIC16C712-20/P Microchip Technology, PIC16C712-20/P Datasheet - Page 34

• Manufacturer Part Number: PIC16C712-20/P
• Description: IC MCU OTP 1KX14 A/D PWM 18DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C712-20/P

• Core Size: 8-Bit
• Program Memory Size: 1.75KB (1K x 14)
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Core Processor: PIC
• Speed: 20MHz
• Number Of I /o: 13
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 18-DIP (0.300", 7.62mm)
• Controller Family/series: PIC16C
• No. Of I/o's: 13
• Ram Memory Size: 128Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC16C712/716
5.3
A crystal oscillator circuit is built in between pins T1OSI
(input) and T1OSO (amplifier output). It is enabled by
setting control bit T1OSCEN (T1CON<3>). The oscilla-
tor is a low power oscillator rated up to 200 kHz. It will
continue to run during SLEEP. It is primarily intended
for a 32 kHz crystal. Table 5-2 shows the capacitor
selection for the Timer1 oscillator.
The Timer1 oscillator is identical to the LP oscillator.
The user must provide a software time delay to ensure
proper oscillator start-up.
TABLE 5-2
TABLE 5-3
DS41106A-page 34
Note 1: Higher capacitance increases the stability
Address Name
0Bh,8Bh
0Ch
8Ch
0Eh
0Fh
10h
07h
87h
Legend:
Osc Type
LP
These values are for design guidance only.
2: Since each resonator/crystal has its own
Timer1 Oscillator
of oscillator but also increases the start-up
time.
characteristics, the user should consult the
resonator/crystal manufacturer for appropri-
ate values of external components.
x = unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used by the Timer1 module.
INTCON
PIR1
PIE1
TMR1L
TMR1H
T1CON
DATACCP
TRISCCP
100 kHz
200 kHz
32 kHz
Freq
CAPACITOR SELECTION FOR
THE TIMER1 OSCILLATOR
REGISTERS ASSOCIATED WITH TIMER1 AS A TIMER/COUNTER
Bit 7 Bit 6
Holding register for the Least Significant Byte of the 16-bit TMR1 register
Holding register for the Most Significant Byte of the 16-bit TMR1 register
GIE
—
—
—
—
—
ADIE
PEIE
ADIF
—
—
—
33 pF
15 pF
15 pF
C1
T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON --00 0000 --uu uuuu
Bit 5
T0IE
—
—
—
—
33 pF
15 pF
15 pF
C2
INTE
Bit 4
—
—
—
—
Preliminary
RBIE
Bit 3
—
—
—
—
5.4
The TMR1 Register pair (TMR1H:TMR1L) increments
from 0000h to FFFFh and rolls over to 0000h. The
TMR1 interrupt, if enabled, is generated on overflow
which is latched in interrupt flag bit TMR1IF (PIR1<0>).
This interrupt can be enabled/disabled by setting/clear-
ing TMR1 interrupt enable bit TMR1IE (PIE1<0>).
5.5
If the CCP module is configured in compare mode to
generate a “special event trigger" (CCP1M3:CCP1M0
= 1011), this signal will reset Timer1 and start an A/D
conversion (if the A/D module is enabled).
Timer1 must be configured for either timer or synchro-
nized counter mode to take advantage of this feature. If
Timer1 is running in asynchronous counter mode, this
reset operation may not work.
In the event that a write to Timer1 coincides with a spe-
cial event trigger from CCP1, the write will take prece-
dence.
In this mode of operation, the CCPR1H:CCPR1L regis-
ters pair effectively becomes the period register for
Timer1.
Note:
CCP1IE
CCP1IF
DCCP
TCCP
Bit 2
T0IF
Timer1 Interrupt
Resetting Timer1 using a CCP Trigger
Output
The special event triggers from the CCP1
module will not set interrupt flag bit
TMR1IF (PIR1<0>).
TMR2IF
TMR2IE
INTF
Bit 1
—
—
TMR1IF
TMR1IE
DT1CK
TT1CK
RBIF
Bit 0
1999 Microchip Technology Inc.
0000 000x 0000 000u
-0-- -000 -0-- -000
-0-- -000 -0-- -000
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
---- -x-x ---- -u-u
---- -1-1 ---- -1-1
Value on
POR,
BOR
Value on
all other
resets