PIC16C712-20/P Microchip Technology, PIC16C712-20/P Datasheet - Page 48

IC MCU OTP 1KX14 A/D PWM 18DIP

PIC16C712-20/P

Manufacturer Part Number
PIC16C712-20/P
Description
IC MCU OTP 1KX14 A/D PWM 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets

Specifications of PIC16C712-20/P

Core Size
8-Bit
Program Memory Size
1.75KB (1K x 14)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
20MHz
Number Of I /o
13
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
18-DIP (0.300", 7.62mm)
Controller Family/series
PIC16C
No. Of I/o's
13
Ram Memory Size
128Byte
Cpu Speed
20MHz
No. Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16C712-20/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC16C712/716
8.1
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (C
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 8-4. The source
impedance (R
impedance directly affect the time required to charge
the capacitor C
impedance varies over the device voltage (V
source impedance affects the offset voltage at the ana-
log input (due to pin leakage current). The maximum
recommended impedance for analog sources is 10
k . After the analog input channel is selected
(changed) this acquisition must be done before the
conversion can be started.
FIGURE 8-4:
DS41106A-page 48
A/D Acquisition Requirements
S
) and the internal sampling switch (R
HOLD
ANALOG INPUT MODEL
Legend C
VA
. The sampling switch (R
Rs
V
I leakage
R
SS
C
PIN
T
IC
HOLD
ANx
C
5 pF
HOLD
PIN
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch
= sample/hold capacitance (from DAC)
various junctions
) must be allowed
V
DD
V
DD
T
= 0.6V
). The
V
T
Preliminary
SS
SS
= 0.6V
)
)
I leakage
500 nA
To calculate the minimum acquisition time, T
the
(DS33023). This equation calculates the acquisition
time to within 1/2 LSb error (512 steps for the A/D). The
1/2 LSb error is the maximum error allowed for the A/D
to meet its specified accuracy.
R
Note:
IC
PICmicro™
1k
V
SS R
DD
Sampling
Switch
When the conversion is started, the hold-
ing capacitor is disconnected from the
input pin.
6V
5V
4V
3V
2V
SS
Mid-Range
Sampling Switch
5 6 7 8 9 10 11
V
SS
C
= DAC capacitance
= 51.2 pF
(k )
HOLD
1999 Microchip Technology Inc.
Reference
ACQ
Manual,
, see

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