PIC16LF1826-I/ML Microchip Technology, PIC16LF1826-I/ML Datasheet - Page 114
![IC MCU 8BIT FLASH 28QFN](/photos/18/99/189937/4243194_sml.jpg)
PIC16LF1826-I/ML
Manufacturer Part Number
PIC16LF1826-I/ML
Description
IC MCU 8BIT FLASH 28QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Specifications of PIC16LF1826-I/ML
Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC16LF
Eeprom Memory Size
256Byte
Ram Memory Size
256Byte
Cpu Speed
32MHz
No. Of Timers
3
Interface
EUSART, I2C, SPI
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC16F/LF1826/27
EXAMPLE 11-5:
DS41391B-page 114
; This write routine assumes the following:
; 1. The 16 bytes of data are loaded, starting at the address in DATA_ADDR
; 2. Each word of data to be written is made up of two adjacent bytes in DATA_ADDR,
;
; 3. A valid starting address (the least significant bits = 000) is loaded in ADDRH:ADDRL
; 4. ADDRH and ADDRL are located in shared data memory 0x70 - 0x7F
;
LOOP
START_WRITE
stored in little endian format
BCF
BANKSEL
MOVF
MOVWF
MOVF
MOVWF
MOVLW
MOVWF
MOVLW
MOVWF
MOVIW
MOVWF
MOVIW
MOVWF
BSF
BCF
BSF
MOVF
XORLW
ANDLW
BTFSC
GOTO
BSF
MOVLW
MOVWF
MOVLW
MOVWF
BSF
NOP
NOP
INCF
GOTO
BCF
MOVLW
MOVWF
MOVLW
MOVWF
BSF
NOP
NOP
BCF
BSF
WRITING TO FLASH PROGRAM MEMORY
INTCON,GIE
EEADRH
ADDRH,W
EEADRH
ADDRL,W
EEADRL
LOW DATA_ADDR
FSR0L
HIGH DATA_ADDR ; Load initial data address
FSR0H
INDF0++
EEDATL
INDF0++
EEDATH
EECON1,EEPGD
EECON1,CFGS
EECON1,WREN
EEADRL,W
0x07
0x07
STATUS,Z
START_WRITE
EECON1,LWLO
55h
EECON2
0AAh
EECON2
EECON1,WR
EEADRL,F
LOOP
EECON1,LWLO
55h
EECON2
0AAh
EECON2
EECON1,WR
EECON1,WREN
INTCON,GIE
; Disable ints so required sequences will execute properly
; Bank 3
; Load initial address
;
;
;
; Load initial data address
;
;
; Load first data byte into lower
;
; Load second data byte into upper
;
; Point to program memory
; Not configuration space
; Enable writes
; Check if lower bits of address are '000'
; Check if we're on the last of 8 addresses
;
; Exit if last of eight words,
;
; Only Load Write Latches
; Start of required write sequence:
; Write 55h
;
; Write AAh
; Set WR bit to begin write
; Any instructions here are ignored as processor
; halts to begin write sequence
; Processor will stop here and wait for write to complete.
; After write processor continues with 3rd instruction.
; Still loading latches Increment address
; Write next latches
; No more Latches only - Actually start write
; Start of required write sequence:
; Write 55h
;
; Write AAh
; Set WR bit to begin write
; Any instructions here are ignored as processor
; halts to begin write sequence
; Processor will stop here and wait for write complete.
; after write processor continues with 3rd instruction
; Disable writes
; Enable interrupts
Preliminary
© 2009 Microchip Technology Inc.
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