AT90PWM2-16SQ Atmel, AT90PWM2-16SQ Datasheet - Page 292
AT90PWM2-16SQ
Manufacturer Part Number
AT90PWM2-16SQ
Description
IC AVR MCU FLASH 8K 24SOIC
Manufacturer
Atmel
Series
AVR® 90PWM Lightingr
Datasheet
1.AT90PWM3B-16SU.pdf
(361 pages)
Specifications of AT90PWM2-16SQ
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
19
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
24-SOIC (7.5mm Width)
Processor Series
AT90PWMx
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
19
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRFBKIT, ATAVRISP2
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
On-chip Dac
10 bit, 1 Channel
For Use With
ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOICATAVRFBKIT - KIT DEMO BALLAST FOR AT90PWM2ATSTK520 - ADAPTER KIT FOR 90PWM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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AT90PWM2/3/2B/3B
Figure 25-8. Parallel Programming Timing, Loading Sequence with Timing Requirements
Note:
Figure 25-9. Parallel Programming Timing, Reading Sequence (within the Same Page) with
Note:
Table 25-14. Parallel Programming Characteristics, V
Symbol
V
I
t
t
t
t
t
PP
DVXH
XLXH
XHXL
XLDX
XLWL
PP
XTAL1
PAGEL
DATA
XTAL1
DATA
BS1
XA0
XA1
BS1
XA0
XA1
OE
1. The timing requirements shown in
1. The timing requirements shown in
ing operation.
ing operation.
Parameter
Programming Enable Voltage
Programming Enable Current
Data and Control Valid before XTAL1 High
XTAL1 Low to XTAL1 High
XTAL1 Pulse Width High
Data and Control Hold after XTAL1 Low
XTAL1 Low to WR Low
Timing Requirements
ADDR0 (Low Byte)
LOAD ADDRESS
ADDR0 (Low Byte)
LOAD ADDRESS
(LOW BYTE)
(LOW BYTE)
t
XLOL
t
OLDV
(1)
(LOW BYTE)
LOAD DATA
DATA (Low Byte)
(LOW BYTE)
DATA (Low Byte)
READ DATA
Figure 25-7
Figure 25-7
t
XLXH
t
BVDV
(i.e., t
(i.e., t
(HIGH BYTE)
LOAD DATA
CC
= 5V ± 10%
DATA (High Byte)
DVXH
DVXH
(HIGH BYTE)
READ DATA
DATA (High Byte)
t
XLPH
, t
, t
LOAD DATA
XHXL
XHXL
11.5
Min
200
150
67
67
0
, and t
, and t
t
OHDZ
t
PLXH
Typ
XLDX
XLDX
LOAD ADDRESS
LOAD ADDRESS
(LOW BYTE)
(LOW BYTE)
) also apply to read-
) also apply to load-
ADDR1 (Low Byte)
ADDR1 (Low Byte)
Max
12.5
250
4317J–AVR–08/10
Units
μA
ns
ns
ns
ns
ns
V
(1)
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