PIC16F688-I/ML Microchip Technology, PIC16F688-I/ML Datasheet - Page 49
![IC PIC MCU FLASH 4KX14 16QFN](/photos/6/65/66536/mfg_mcp7386x_qfn_sml.jpg)
PIC16F688-I/ML
Manufacturer Part Number
PIC16F688-I/ML
Description
IC PIC MCU FLASH 4KX14 16QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(204 pages)
3.PIC16F688T-ISL.pdf
(6 pages)
4.PIC16F688T-ISL.pdf
(4 pages)
5.PIC16F688T-ISL.pdf
(688 pages)
6.PIC16F688-IML.pdf
(202 pages)
Specifications of PIC16F688-I/ML
Program Memory Type
FLASH
Program Memory Size
7KB (4K x 14)
Package / Case
16-QFN
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
12
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART/RS- 232/SCI/USB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT16QFN1 - SOCKET TRANSITION 14DIP TO 16QFNAC162061 - HEADER INTRFC MPLAB ICD2 20PINAC162056 - HEADER INTERFACE ICD2 16F688
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F688T-ISL PDF datasheet #3
- PIC16F688T-ISL PDF datasheet #4
- PIC16F688T-ISL PDF datasheet #5
- PIC16F688-IML PDF datasheet #6
- Current page: 49 of 204
- Download datasheet (4Mb)
REGISTER 5-1:
TABLE 5-1:
© 2009 Microchip Technology Inc.
TMR0
INTCON
OPTION_REG
TRISA
Legend: – = Unimplemented locations, read as ‘0’, u = unchanged, x = unknown. Shaded cells are not used by the
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
Note 1:
R/W-1
RAPU
Name
Timer0 module.
A dedicated 16-bit WDT postscaler is available. See Section 11.5 “Watchdog Timer (WDT)” for more
information.
RAPU: PORTA Pull-up Enable bit
1 = PORTA pull-ups are disabled
0 = PORTA pull-ups are enabled by individual PORT latch values
INTEDG: Interrupt Edge Select bit
1 = Interrupt on rising edge of INT pin
0 = Interrupt on falling edge of INT pin
T0CS: TMR0 Clock Source Select bit
1 = Transition on T0CKI pin
0 = Internal instruction cycle clock (F
T0SE: TMR0 Source Edge Select bit
1 = Increment on high-to-low transition on T0CKI pin
0 = Increment on low-to-high transition on T0CKI pin
PSA: Prescaler Assignment bit
1 = Prescaler is assigned to the WDT
0 = Prescaler is assigned to the Timer0 module
PS<2:0>: Prescaler Rate Select bits
Timer0 Module Register
RAPU INTEDG
SUMMARY OF REGISTERS ASSOCIATED WITH TIMER0
Bit 7
INTEDG
GIE
R/W-1
—
OPTION_REG: OPTION REGISTER
BIT VALUE
PEIE
Bit 6
000
001
010
011
100
101
110
111
—
W = Writable bit
‘1’ = Bit is set
R/W-1
T0CS
TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 --11 1111 --11 1111
T0CS
Bit 5
TMR0 RATE
T0IE
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
T0SE
Bit 4
INTE
R/W-1
T0SE
WDT RATE
1 : 1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
OSC
RAIE
Bit 3
PSA
/4)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-1
PSA
Bit 2
T0IF
PS2
INTF
Bit 1
PS1
R/W-1
PS2
RAIF
Bit 0
PS0
x = Bit is unknown
PIC16F688
xxxx xxxx uuuu uuuu
0000 000x 0000 000x
1111 1111 1111 1111
POR, BOR
Value on
R/W-1
PS1
DS41203E-page 47
Value on
all other
Resets
R/W-1
PS0
bit 0
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