PIC12LC672-04I/SM Microchip Technology, PIC12LC672-04I/SM Datasheet - Page 19

• Manufacturer Part Number: PIC12LC672-04I/SM
• Description: IC MCU OTP 2KX14 LV A/D 8-SOIJ
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12LC672-04I/SM

• Core Size: 8-Bit
• Program Memory Size: 3.5KB (2K x 14)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Controller Family/series: PIC12
• No. Of I/o's: 6
• Ram Memory Size: 128Byte
• Cpu Speed: 4MHz
• No. Of Timers: 1
• Digital Ic: RoHS Compliant
• Processor Series: PIC12LC
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 8
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details
• Other names: Q732363A

4.2.2.5
This register contains the individual flag bits for the
Peripheral interrupts.
REGISTER 4-5:
bit7
1999 Microchip Technology Inc.
bit 7:
bit 6:
bit 5-0: Unimplemented: Read as ’0’
U-0
—
PIR1 REGISTER
Unimplemented: Read as ’0’
ADIF: A/D Converter Interrupt Flag bit
1 = An A/D conversion completed (must be cleared in software)
0 = The A/D conversion is not complete
R/W-0
ADIF
PIR1 REGISTER (ADDRESS 0Ch)
U-0
—
U-0
—
U-0
—
U-0
—
Note:
U-0
—
Interrupt flag bits get set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>). User soft-
ware should ensure the appropriate inter-
rupt flag bits are clear prior to enabling an
interrupt.
U-0
—
bit0
R = Readable bit
W = Writable bit
U = Unimplemented bit,
- n = Value at POR reset
PIC12C67X
read as ‘0’
DS30561B-page 19