PIC12LC671-04I/SM Microchip Technology, PIC12LC671-04I/SM Datasheet - Page 76

• Manufacturer Part Number: PIC12LC671-04I/SM
• Description: IC MCU OTP 1KX14 LV A/D 8-SOIJ
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12LC671-04I/SM

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Size: 1.75KB (1K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Processor Series: PIC12LC
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 8
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

PIC12C67X
GOTO
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
INCF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
DS30561B-page 76
Unconditional Branch
[ label ]
0
k
PCLATH<4:3>
None
GOTO is an unconditional branch.
The eleven bit immediate value is
loaded into PC bits <10:0>. The
upper bits of PC are loaded from
PCLATH<4:3>. GOTO is a two
cycle instruction.
1
2
After Instruction
Increment f
[ label ]
0
d
(f) + 1
Z
The contents of register ’f’ are
incremented. If ’d’ is 0, the result
is placed in the W register. If ’d’ is
1, the result is placed back in reg-
ister ’f’.
1
1
Before Instruction
After Instruction
GOTO THERE
INCF
10
00
k
f
[0,1]
PC<10:0>
127
2047
PC =
CNT
Z
CNT
Z
(dest)
GOTO k
INCF f,d
1kkk
1010
CNT,
1
PC<12:11>
Address THERE
=
=
=
=
kkkk
dfff
0xFF
0
0x00
1
kkkk
ffff
INCFSZ
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
IORLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
Increment f, Skip if 0
[ label ]
0
d
(f) + 1
None
The contents of register ’f’ are
incremented. If ’d’ is 0, the result
is placed in the W register. If ’d’ is
1, the result is placed back in reg-
ister ’f’.
If the result is 0, the next instruc-
tion, which is already fetched, is
discarded. A NOP is executed
instead making it a two cycle
instruction.
1
1(2)
Before Instruction
After Instruction
Inclusive OR Literal with W
[ label ]
0
(W) .OR. k
Z
The contents of the W register are
OR’ed with the eight bit literal 'k'.
The result is placed in the W reg-
ister.
1
1
Before Instruction
After Instruction
HERE
CONTINUE •
IORLW
00
11
PC
CNT
if CNT=
PC
if CNT
PC
f
k
[0,1]
1999 Microchip Technology Inc.
127
255
W
W
Z
(dest), skip if result = 0
INCFSZ f,d
IORLW k
=
=
=
=
1111
1000
0x35
INCFSZ
GOTO
•
•
=
=
=
(W)
address HERE
CNT + 1
0,
address CONTINUE
0,
address HERE +1
0x9A
0xBF
1
dfff
kkkk
LOOP
CNT,
ffff
kkkk
1