PIC12LC671-04I/MF Microchip Technology, PIC12LC671-04I/MF Datasheet
PIC12LC671-04I/MF
Specifications of PIC12LC671-04I/MF
Related parts for PIC12LC671-04I/MF
PIC12LC671-04I/MF Summary of contents
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... Four-channel, 8-bit A/D converter • 8-bit real time clock/counter (TMR0) with 8-bit programmable prescaler • 1,000,000 erase/write cycle EEPROM data memory • EEPROM data retention > 40 years 1999 Microchip Technology Inc. PIC12C67X Pin Diagrams: PDIP, SOIC, Windowed CERDIP V DD GP5/OSC1/CLKIN ...
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... However, we realize that we may have missed a few things. If you find any information that is missing or appears in error, please: • Fill out and mail in the reader response form in the back of this data sheet. • E-mail us at webmaster@microchip.com. We appreciate your assistance in making this a better document. DS30561B-page 2 To Our Valued Customers 1999 Microchip Technology Inc. ...
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... The SLEEP (power-down) feature provides a power-saving mode. The user can wake-up the chip from SLEEP through several external and internal interrupts and resets. 1999 Microchip Technology Inc. A highly reliable Watchdog Timer with its own on-chip RC oscillator provides protection against software lock-up. ...
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... PIC12C67X TABLE 1-1: PIC12C67X & PIC12CE67X FAMILY OF DEVICES PIC12C671 PIC12LC671 Maximum 10 10 Frequency Clock of Operation (MHz) EPROM 1024 x 14 1024 x 14 Program Memory Memory RAM Data 128 128 Memory (bytes) EEPROM — — Data Memory (bytes) Timer TMR0 TMR0 Peripherals Module(s) ...
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... PIC12C671. These devices have EPROM type memory and operate over the standard voltage range PIC12LC671. These devices have EPROM type memory and operate over an extended voltage range PIC12CE674. These devices have EPROM type memory, EEPROM data memory and operate over the standard voltage range ...
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... PIC12C67X NOTES: DS30561B-page 6 1999 Microchip Technology Inc. ...
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... PIC12CE674 128 x 8 1999 Microchip Technology Inc. The PIC12C67X can directly or indirectly address its register files or data memory. All special function regis- ters, including the program counter, are mapped in the data memory. The PIC12C67X has an orthogonal (symmetrical) instruction set that makes it possible to carry out any operation on any register using any addressing mode ...
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... Addr MUX Indirect 7 8 Addr FSR reg STATUS reg 3 MUX Power-up Timer Oscillator ALU Watchdog 8 Timer Power-on W reg Reset Timer0 A/D — — GPIO GP0/AN0 GP1/AN1/V REF GP2/T0CKI/AN2/INT GP3/MCLR/V PP GP4/OSC2/AN3/CLKOUT GP5/OSC1/CLKIN 16x8 EEPROM Data PIC12CE673 Memory PIC12CE674 1999 Microchip Technology Inc. ...
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... Legend input output, I/O = input/output power, — = not used, TTL = TTL input Schmitt Trigger input. 1999 Microchip Technology Inc. I/O/P Buffer Type Type I/O TTL/ST Bi-directional I/O port/serial programming data/analog input 0. Can be software programmed for internal weak pull-up and interrupt-on-pin change. This buffer is a Schmitt Trigger input when used in serial programming mode ...
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... Q2, Q3, and Q4 cycles. Data memory is read during Q2 (operand read) and written during Q4 (destination write PC+1 Fetch INST (PC+1) Execute INST (PC Execute 1 Fetch 2 Execute 2 Fetch 3 Execute 3 Fetch Internal phase clock PC+2 Fetch INST (PC+2) Execute INST (PC+ Flush Fetch SUB_1 Execute SUB_1 1999 Microchip Technology Inc. ...
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... Interrupt Vector On-Chip Program Memory (PIC12C672 and PIC12CE674 only) 1999 Microchip Technology Inc. 4.2 Data Memory Organization The data memory is partitioned into two banks, which contain the General Purpose Registers and the Special Function Registers. Bit RP0 is the bank select bit. ...
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... A0h BFh C0h EFh F0h FFh 1999 Microchip Technology Inc. ...
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... Other (non power-up) resets include external reset through MCLR and Watchdog Timer Reset. 4: The IRP and RP1 bits are reserved on the PIC12C67X; always maintain these bits clear. 5: The SCL (GP7) and SDA (GP6) bits are unimplemented on the PIC12C671/672 and read as ’0’. 1999 Microchip Technology Inc. Bit 5 Bit 4 ...
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... PCFG1 PCFG0 ---- -000 ---- -000 1999 Microchip Technology Inc. ...
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... For borrow the polarity is reversed. A subtraction is executed by adding the two’s complement of the sec- ond operand. For rotate (RRF, RLF) instructions, this bit is loaded with either the high or low order bit of the source register. 1999 Microchip Technology Inc recommended, therefore, that only BCF, BSF, SWAPF and MOVWF instructions are used to alter the STATUS Register, because these instructions do not affect the bits from the STATUS Register ...
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... To achieve a 1:1 prescaler assignment for the TMR0 register, assign the prescaler to the Watchdog Timer by setting bit PSA (OPTION<3>). R/W-1 R/W-1 R/W-1 R/W-1 PSA PS2 PS1 PS0 128 R = Readable bit W = Writable bit bit0 U = Unimplemented bit, read as ‘0’ Value at POR reset 1999 Microchip Technology Inc. ...
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... GPIF: GPIO Interrupt on Change Flag bit 1 = GP0, GP1 or GP3 pins changed state (must be cleared in software Neither GP0, GP1 nor GP3 pins have changed state 1999 Microchip Technology Inc. Note: Interrupt flag bits get set when an interrupt condition occurs, regardless of the state of its corresponding enable bit or the global enable bit, GIE (INTCON< ...
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... Unimplemented: Read as ’0’ DS30561B-page 18 Note: Bit PEIE (INTCON<6>) must be set to enable any peripheral interrupt. U-0 U-0 U-0 U-0 — — — — bit0 R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ Value at POR reset 1999 Microchip Technology Inc. ...
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... ADIF: A/D Converter Interrupt Flag bit A/D conversion completed (must be cleared in software The A/D conversion is not complete bit 5-0: Unimplemented: Read as ’0’ 1999 Microchip Technology Inc. Note: Interrupt flag bits get set when an interrupt condition occurs, regardless of the state of its corresponding enable bit or the global enable bit, GIE (INTCON< ...
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... A Power-on Reset occurred (must be set in software after a Power-on Reset occurs) bit 0: Unimplemented: Read as ’0’ DS30561B-page 20 U-0 U-0 R/W-0 U-0 — — POR — bit0 R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ Value at POR reset 1999 Microchip Technology Inc. ...
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... CALFST: Calibration Fast 1 = Increase frequency change bit 2: CALSLW: Calibration Slow 1 = Decrease frequency change bit 1-0: Unimplemented: Read as ’0’ Note: If CALFST = 1 and CALSLW = 1, CALFST has precedence. 1999 Microchip Technology Inc. R/W-0 R/W-0 U-0 U-0 CALFST CALSLW — — bit0 PIC12C67X ...
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... PCLATH<4:3>, which are used to access program memory when more than one page is available. The use of PCLATH<4:3> as general purpose read/write bits for the PIC12C67X is not recommended since this may affect upward compatibility with future products. ignores both paging bits 1999 Microchip Technology Inc. ...
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... Data Memory 7Fh Bank 0 For register file map detail see Figure 4-2. Note 1: The RP1 and IRP bits are reserved; always maintain these bits clear. 1999 Microchip Technology Inc. EXAMPLE 4-1: movlw movwf NEXT clrf incf btfss goto ...
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... PIC12C67X NOTES: DS30561B-page 24 1999 Microchip Technology Inc. ...
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... TRIS for pins GP4 and GP5 is forced to a ’1’ where appropriate. Writes to TRIS <5:4> will have an effect in EXTRC and INTRC oscillator modes only. When GP4 is configured as CLKOUT, changes to TRIS<4> will have no effect. 1999 Microchip Technology Inc. PIC12C67X 5.3 I/O Interfacing The equivalent circuit for an I/O port pin is shown in Figure 5-1 through Figure 5-5 ...
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... CK Q Data Latch TRIS CK Q TRIS Latch RD PORT (1) GP0/INT and GP1/INT To A/D Converter Note 1: Wake-up on pin change interrupts for GP0 and GP1. DS30561B-page 26 REF GPPU Analog Input Mode RD TRIS (1) PIN V DD I/O Pin V SS TTL Input Buffer 1999 Microchip Technology Inc. ...
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... FIGURE 5-2: BLOCK DIAGRAM OF GP2/T0CKI/AN2/INT PIN Data Bus PORT CK Q Data Latch TRIS CK Q TRIS Latch RD PORT TMR0 Clock Input GP2/INT To A/D Converter 1999 Microchip Technology Inc Analog Input Mode RD TRIS PIC12C67X V DD I/O Pin V SS Schmitt Trigger Input Buffer DS30561B-page 27 ...
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... PIC12C67X FIGURE 5-3: BLOCK DIAGRAM OF GP3/MCLR/V Program Mode HV Detect Data Bus RD PORT RD TRIS (1) GP3/INT Note 1: Wake-up on pin change interrupt for GP3. DS30561B-page 28 PIN GPPU P MCLREN MCLR Schmitt Trigger Input Buffer Input Pin V SS TTL Input Buffer 1999 Microchip Technology Inc. ...
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... BLOCK DIAGRAM OF GP4/OSC2/AN3/CLKOUT PIN CLKOUT (F /4) OSC Data Bus PORT CK Q Data Latch TRIS CK Q TRIS Latch RD PORT To A/D Converter 1999 Microchip Technology Inc. INTRC or EXTRC w/ CLKOUT 1 0 From OSC1 Oscillator Circuit INTRC EXTRC INTRC or EXTRC w/o CLKOUT Analog Input Mode ...
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... PIC12C67X FIGURE 5-5: BLOCK DIAGRAM OF GP5/OSC1/CLKIN PIN Data Bus PORT EN Q Data Latch TRIS EN Q TRIS Latch RD TRIS RD PORT DS30561B-page 30 To OSC2 Oscillator Circuit INTRC INTRC I/O Pin V SS TTL Input Buffer 1999 Microchip Technology Inc. ...
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... Writing to the port register writes the value to the port latch. When using read-modify-write instructions (i.e., BCF, BSF, etc port, the value of the port pins is read, the desired operation is done to this value, and this value is then written to the port latch. 1999 Microchip Technology Inc. Bit 5 Bit 4 Bit 3 Bit 2 ...
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... PIC12C67X NOTES: DS30561B-page 32 1999 Microchip Technology Inc. ...
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... SERIAL CLOCK This SCL signal is used to synchronize the data trans- fer from and to the EEPROM. 1999 Microchip Technology Inc. 6.1 Bus Characteristics The following bus protocol used with the EEPROM data memory. In this section, the term “proces- sor” is used to denote the portion of the PIC12C67X that interfaces to the EEPROM via software. • ...
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... EEPROM. In this case, the EEPROM must leave the data line HIGH to enable the processor to generate the STOP condition (Figure 6-4). Reset Schmitt Trigger EN CK ltchpin Schmitt Trigger EN CK ltchpin EEPROM SDA Pad EEPROM SCL P Pad N 1999 Microchip Technology Inc. ...
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... The bus is monitored for its cor- responding EEPROM address all the time. It generates an acknowledge bit if the EEPROM address was true and it is not in a programming mode. 1999 Microchip Technology Inc. (C) (D) ADDRESS OR DATA ...
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... Figure 6-6 for flow diagram.) FIGURE 6-6: WORD ADDRESS ACKNOWLEDGE POLLING FLOW Send Write Command Send Stop Condition to Initiate Write Cycle Send Start Send Control Byte with R Did EEPROM NO Acknowledge (ACK = 0)? YES Next Operation S T DATA 1999 Microchip Technology Inc. ...
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... SDA LINE ACTIVITY 1999 Microchip Technology Inc. address is sent, the processor generates a start condi- tion following the acknowledge. This terminates the write operation, but not before the internal address pointer is set. Then the processor issues the control byte again, but with the R/W bit set to a one. The EEPROM will then issue an acknowledge and trans- mits the 8-bit data word ...
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... PIC12C67X NOTES: DS30561B-page 38 1999 Microchip Technology Inc. ...
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... T0 T0+1 TMR0 Instruction Executed 1999 Microchip Technology Inc. (OPTION<4>). Clearing bit T0SE selects the rising edge. Restrictions on the external clock input are dis- cussed in detail in Section 7.2. The prescaler is mutually exclusively shared between the Timer0 module and the Watchdog Timer. The pres- caler assignment is controlled in software by control bit PSA (OPTION< ...
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... FFh 00h 1 (2) Interrupt Latency Inst (PC+1) Dummy cycle Inst (PC) = instruction cycle time. CY PC+4 PC+5 PC+6 NT0+1 Read TMR0 Read TMR0 reads NT0 reads NT0 + 01h 02h 0004h 0005h Inst (0004h) Inst (0005h) Dummy cycle Inst (0004h) 1999 Microchip Technology Inc. ...
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... External clock if no prescaler selected; prescaler output otherwise. 3: The arrows indicate the points in time where sampling occurs. 1999 Microchip Technology Inc. caler, so that the prescaler output is symmetrical. For the external clock to meet the sampling requirement, the ripple-counter must be taken into account. There- ...
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... WDT, a CLRWDT instruction will clear the prescaler along with the Watchdog Timer. The pres- caler is not readable or writable SYNC Cycles PSA 8-bit Prescaler 1MUX PS<2:0> PSA WDT Time-out Data Bus 8 TMR0 reg Set flag bit T0IF on Overflow 1999 Microchip Technology Inc. ...
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... OPTION GPPU INTEDG 85h TRIS — — Legend unknown unchanged unimplemented locations read as '0'. Shaded cells are not used by Timer0. 1999 Microchip Technology Inc. To change prescaler from the WDT to the Timer0 mod- ule, use the sequence shown in Example 7-2. EXAMPLE 7-2: CLRWDT BSF STATUS, RP0 ...
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... PIC12C67X NOTES: DS30561B-page 44 1999 Microchip Technology Inc. ...
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... ADON: A/D on bit 1 = A/D converter module is operating 0 = A/D converter module is shut off and consumes no operating current 1999 Microchip Technology Inc. The ADCON0 Register, shown in Figure 8-1, controls the operation of the A/D module. The ADCON1 Regis- ter, shown in Figure 8-2, configures the functions of the port pins ...
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... Any instruction that reads a pin configured as an analog input will read a '0'. DS30561B-page 46 U-0 R/W-0 R/W-0 R/W-0 — PCFG2 PCFG1 PCFG0 bit0 GP2 GP1 GP0 REF REF REF Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ =Value at POR reset REF V DD GP1 V DD GP1 V DD GP1 1999 Microchip Technology Inc. ...
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... Turn on A/D module (ADCON0) FIGURE 8-1: A/D BLOCK DIAGRAM A/D Converter V REF (Reference voltage) 1999 Microchip Technology Inc. 2. Configure A/D interrupt (if desired): • Clear ADIF bit • Set ADIE bit • Set GIE bit 3. Wait the required acquisition time. 4. Start conversion: • ...
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... 5.724 C)(0.05 s/ C)] ACQ 10.724 s + 1.25 s 11.974 Sampling Switch Rss leakage V = 0.6V T ± 500 has no REF ) is HOLD delay must complete before AD CALCULATING THE MINIMUM REQUIRED SAMPLE TIME ( ln(1/512 HOLD = DAC capacitance = 51 Sampling Switch ( k ) 1999 Microchip Technology Inc. ...
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... For faster conversion times, the selection of another clock source is recommended. 4: While in RC mode, with device frequency above 1 MHz, conversion accuracy is out of specification. 5: For extended voltage devices (LC), please refer to Electrical Specifications section. 1999 Microchip Technology Inc. 8.3 Configuring Analog Port Pins . The ...
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... RC Clock, A/D is on, Channel 0 is selected ; ; Clear A/D interrupt flag bit ; Enable peripheral interrupts ; Enable all interrupts ; Start A/D Conversion ; The ADIF bit will be set and the GO/DONE bit ; is cleared upon completion of the A/D Conversion. wait AD 1999 Microchip Technology Inc. ...
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... A/D conversion, the RC clock source selection is required. In this mode, the digital noise from the modules in SLEEP are stopped. This method gives high accuracy. 1999 Microchip Technology Inc. 8.7 Effects of a Reset A device reset forces all registers to their reset state. ...
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... Bit 0 Power-on all other Reset Resets GPIF 0000 000x 0000 000u — — -0-- ---- -0-- ---- — — -0-- ---- -0-- ---- xxxx xxxx uuuu uuuu ADON 0000 0000 0000 0000 PCFG0 ---- -000 ---- -000 11xx xxxx 11uu uuuu GP0 --11 1111 --11 1111 TRIS0 1999 Microchip Technology Inc. ...
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... XT Oscillator 000 = LP Oscillator Note 1: All of the CP<1:0> pairs have to be given the same value to enable the code protection scheme listed. 1999 Microchip Technology Inc. the chip in reset until the crystal oscillator is stable. The other is the Power-up Timer (PWRT), which provides a ...
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... CAPACITOR SELECTION FOR CRYSTAL OSCILLATOR - PIC12C67X Cap. Range Cap. Range 15-30 pF 30-47 pF 15-30 pF 15-82 pF 15-30 pF 200-300 pF 15-30 pF 100-200 pF 15-30 pF 15-100 pF 15-30 pF 15-30 pF 15-30 pF 15-30 pF 15-47 pF 15-47 pF 15-30 pF 15-30 pF 15-30 pF 15-30 pF 15-30 pF 15-30 pF > 4.5V 1999 Microchip Technology Inc. ...
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... Devices 330 330 74AS04 74AS04 74AS04 0.1 F XTAL 1999 Microchip Technology Inc. 9.2.4 EXTERNAL RC OSCILLATOR For timing insensitive applications, the RC device option offers additional cost savings. The RC oscillator frequency is a function of the supply voltage, the resistor (R EXT operating temperature. In addition to this, the oscillator ...
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... OSC driven by external circuit INTRC, CLKOUT OSC1 pin is on OSC2 tristate input INTRC, OSC2 is OSC1 pin is I/O tristate input OSC2 pin is driven low OSC2 pin is tristate input OSC2 pin is driven low OSC2 pin is tristate input 1999 Microchip Technology Inc. ...
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... OST 10-bit Ripple-counter OSC1/ CLKIN Pin PWRT (1) On-chip 10-bit Ripple-counter RC OSC Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin. 1999 Microchip Technology Inc. MCLRE INTERNAL MCLR Enable PWRT See Table 9-4 for time-out situations. Enable OST PIC12C67X S Chip_Reset R Q ...
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... Reset and is unaffected otherwise. The user sets this bit following a Power-on Reset. On subsequent resets, if POR is ‘0’, it will indicate that a Power-on Reset must have occurred. Power-up Wake-up from SLEEP PWRTE = 1 1024T 1024T OSC OSC — OSC — 1999 Microchip Technology Inc. ...
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... See Table 9-5 for reset value for specific condition wake-up was due to A/D completing then bit all other interrupts generating a wake-up will cause bit wake-up was due to A/D completing then bit all other interrupts generating a wake-up will cause bit 1999 Microchip Technology Inc. Program STATUS ...
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... MCLR INTERNAL POR PWRT TIME-OUT OST TIME-OUT INTERNAL RESET FIGURE 9-9: TIME-OUT SEQUENCE ON POWER-UP (MCLR TIED MCLR INTERNAL POR PWRT TIME-OUT OST TIME-OUT INTERNAL RESET DS30561B-page 60 T PWRT T OST T PWRT T OST ) DD T PWRT T OST 1999 Microchip Technology Inc. ): CASE CASE 2 DD ...
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... MCLR from external capacitor C, in the event of MCLR/V pin breakdown due to PP Electrostatic Discharge (ESD) or Electrical Overstress (EOS). 1999 Microchip Technology Inc. FIGURE 9-11: EXTERNAL BROWN-OUT PROTECTION CIRCUIT 33k 10k Note 1: This circuit will activate reset when V below ( ...
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... Individual interrupt flag bits are set, regardless of the status of their corresponding mask bit or the GIE bit. T0IF T0IE INTF INTE GPIF GPIE PEIE GIE Wake-up (If in SLEEP mode) Interrupt to CPU 1999 Microchip Technology Inc. ...
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... T CY Latency is the same whether Inst (PC single cycle or a 2-cycle instruction. 3: CLKOUT is available only in INTRC and EXTRC oscillator modes. 4: For minimum width of INT pulse, refer to AC specs. 5: INTF is enabled to be set anytime during the Q4-Q1 cycles. 1999 Microchip Technology Inc ...
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... W_TEMP ;Swap W_TEMP into W ;Return from interrupt ;Copy W to TEMP register (bank independent) ;Move STATUS register into W ;Save contents of STATUS register ;Retrieve copy of STATUS register ;Restore pre-isr STATUS register contents ; ;Restore pre-isr W register contents ;Return from interrupt 1999 Microchip Technology Inc. ...
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... Legend: Shaded cells are not used by the Watchdog Timer. Note 1: See Register 9-1 for operation of these bits. Not all CP0 and CP1 bits are shown. 1999 Microchip Technology Inc. The CLRWDT and SLEEP instructions clear the WDT and the postscaler, if assigned to the WDT, and prevent it from timing out early and generating a premature device RESET condition ...
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... SLEEP instruction completes. To determine whether a SLEEP instruction executed, test the PD bit. If the PD bit is set, the SLEEP instruction was executed as a NOP. To ensure that the WDT is cleared, a CLRWDT instruc- tion should be executed before a SLEEP instruction. 1999 Microchip Technology Inc. ...
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... (see programming PP IL IHH specification). GP1 (clock) becomes the programming clock and GP0 (data) becomes the programming data. Both GP0 and GP1 are Schmitt Trigger inputs in this mode. 1999 Microchip Technology Inc (2) OST Interrupt Latency (Note 3) Processor in SLEEP PC+2 ...
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... PIC12C67X NOTES: DS30561B-page 68 1999 Microchip Technology Inc. ...
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... Assigned to < > Register bit field In the set of i talics User defined term (font is courier) 1999 Microchip Technology Inc. PIC12C67X The instruction set is highly orthogonal and is grouped into three basic categories: • Byte-oriented operations • Bit-oriented operations • Literal and control operations ...
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... BIT MANIPULATION All bit manipulation instructions are done by first read- ing the entire register, operating on the selected bit and writing the result back (read-modify-write). The user should keep this in mind when operating on special function registers, such as ports. 1999 Microchip Technology Inc. PCL ...
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... If this instruction is executed on the TMR0 register (and, where applicable 1), the prescaler will be cleared if assigned to the Timer0 Module Program Counter (PC) is modified or a conditional test is true, the instruction requires two cycles. The second cycle is executed as a NOP. 1999 Microchip Technology Inc. PIC12C67X Cycles 14-Bit Opcode ...
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... ANDWF f 127 d (W) .AND. (f) (dest 0101 dfff ffff AND the W register with register 'f the result is stored in the W register the result is stored back in register 'f ANDWF FSR, Before Instruction W = 0x17 FSR = 0xC2 After Instruction W = 0x17 FSR = 0x02 1999 Microchip Technology Inc. ...
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... Description: Bit ’b’ in register ’f’ is set. Words: 1 Cycles: 1 Example BSF FLAG_REG, Before Instruction FLAG_REG = 0x0A After Instruction FLAG_REG = 0x8A 1999 Microchip Technology Inc. BTFSC Syntax: Operands: Operation: Status Affected: Encoding: bfff ffff Description: Words: Cycles: Example bfff ffff ...
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... The contents of register ’f’ are cleared and the Z bit is set CLRF FLAG_REG Before Instruction FLAG_REG = 0x5A After Instruction FLAG_REG = 0x00 Clear W [ label ] CLRW None 00h ( 0001 0000 0011 W register is cleared. Zero bit (Z) is set CLRW Before Instruction W = 0x5A After Instruction W = 0x00 1999 Microchip Technology Inc. ...
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... If ’d’ the result is stored ’d’ the result is stored back in register ’f’. Words: 1 Cycles: 1 Example COMF REG1,0 Before Instruction REG1 = After Instruction REG1 = W = 1999 Microchip Technology Inc. DECF Syntax: Operands: Operation: Status Affected: Encoding: Description: 0110 0100 Words: Cycles: Example ? 0x00 ...
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... HERE +1 Inclusive OR Literal with W [ label ] IORLW 255 (W) .OR 1000 kkkk kkkk The contents of the W register are OR’ed with the eight bit literal 'k'. The result is placed in the W reg- ister IORLW 0x35 Before Instruction W = 0x9A After Instruction W = 0xBF 1999 Microchip Technology Inc. ...
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... The eight bit literal ’k’ is loaded into W register. The don’t cares will assemble as 0’s. Words: 1 Cycles: 1 Example MOVLW 0x5A After Instruction W = 0x5A 1999 Microchip Technology Inc. MOVF f,d Syntax: Operands: Operation: Status Affected: Encoding: dfff ffff Description: Words: Cycles: Example ...
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... This is a two cycle instruction CALL TABLE;W contains table ;offset value • ;W now has table value • • ADDWF offset RETLW k1 ;Begin table RETLW k2 ; • • • RETLW kn ; End of table Before Instruction W = 0x07 After Instruction W = value of k8 1999 Microchip Technology Inc. ...
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... C Register f Words: 1 Cycles: 1 Example RLF REG1,0 Before Instruction REG1 C After Instruction REG1 W C 1999 Microchip Technology Inc. RRF Syntax: Operands: Operation: Status Affected: 0000 1000 Encoding: Description: Words: Cycles: Example SLEEP Syntax: Operands: Operation: dfff ...
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... After Instruction REG1 W C Example 2: Before Instruction REG1 W C After Instruction REG1 W C Example 3: Before Instruction REG1 W C After Instruction REG1 W C SUBWF f,d 127 dest) 0010 dfff ffff REG1 result is positive = result is zero = 0xFF = result is negative 1999 Microchip Technology Inc. ...
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... Words: 1 Cycles: 1 Example To maintain upward compatibility with future PIC12C67X products, do not use this instruction. 1999 Microchip Technology Inc. XORLW Syntax: Operands: Operation: Status Affected: Encoding: Description: dfff ffff Words: ...
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... PIC12C67X NOTES: DS30561B-page 82 1999 Microchip Technology Inc. ...
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... A full featured editor • A project manager • Customizable tool bar and key mapping • A status bar • On-line help 1999 Microchip Technology Inc. PIC12C67X MPLAB allows you to: • Edit your source files (either assembly or ‘C’) • One touch assemble (or compile) and download ...
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... PICmicro MCU. 11.7 PICMASTER/PICMASTER CE The PICMASTER system from Microchip Technology is a full-featured, professional quality emulator system. This flexible in-circuit emulator provides a high-quality, universal platform for emulating Microchip 8-bit PICmicro microcontrollers (MCUs). PICMASTER sys- tems are sold worldwide, with a CE compliant model available for European Union (EU) countries ...
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... SIMICE is an entry-level hardware development sys- tem designed to operate in a PC-based environment with Microchip’s simulator MPLAB-SIM. Both SIMICE and MPLAB-SIM run under Microchip Technology’s MPLAB Integrated Development Environment (IDE) software. Specifically, SIMICE provides hardware sim- ulation for Microchip’s PIC12C5XX, PIC12CE5XX, and PIC16C5X families of PICmicro 8-bit microcontrollers ...
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... Programming Tools K L evaluation and programming tools support EE OQ Microchips HCS Secure Data Products. The HCS eval- uation kit includes an LCD display to show changing codes, a decoder to decode transmissions, and a pro- gramming interface to program test transmitters. DS30561B-page 86 PIC17C756, 1999 Microchip Technology Inc. ...
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... PIC16C6X á á á á PIC16C5X á á á á PIC14000 á á á á PIC12CXXX Tools Software Emulators 1999 Microchip Technology Inc. á á á á á á á á á á á á á á á á á á ...
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... PIC12C67X NOTES: DS30561B-page 88 1999 Microchip Technology Inc. ...
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... This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. 1999 Microchip Technology Inc. (except V and MCLR)................................................... –0. (Note 2) ...
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... Note 1: The shaded region indicates the permissible combinations of voltage and frequency. 2: The maximum rated speed of the part limits the permissible combinations of voltage and frequency. Please reference the Product Identification System section for the maximum rated speed of the parts. DS30561B-page Frequency (MHz Frequency (MHz + +125 + 1999 Microchip Technology Inc. ...
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... Note 1: The shaded region indicates the permissible combinations of voltage and frequency. 2: The maximum rated speed of the part limits the permissible combinations of voltage and frequency. Please reference the Product Identification System section for the maximum rated speed of the parts. 1999 Microchip Technology Inc ...
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... Commercial, WDT disabled 3.0V, Industrial, WDT disabled 3.0V, Extended, WDT disabled 5.5V, Commercial, WDT disabled 5.5V, Industrial, WDT disabled 5.5V, Extended, WDT disabled 3.0V, Commercial 3.0V, Industrial 3.0V, Extended 4MHz 5.5V, SCL = 400kHz OSC DD For PIC12CE673/674 only , T0CKI = 1999 Microchip Technology Inc. ...
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... The power-down current in SLEEP mode does not depend on the oscillator type. Power-down current is measured with the part in SLEEP mode, with all I/O pins in hi-impedance state and tied INTRC calibration value is for 4MHz nominal at 5V, 25°C. 1999 Microchip Technology Inc. Standard Operating Conditions (unless otherwise specified) Operating Temperature 0° ...
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... PIC12C67X 12.2 DC Characteristics: PIC12LC671/672 (Commercial, Industrial) PIC12LCE673/674 (Commercial, Industrial) DC CHARACTERISTICS Param Characteristic No. D001 Supply Voltage D002 RAM Data Retention (2) Voltage D003 V Start Voltage to DD ensure Power-on Reset D004 V Rise Rate to ensure DD Power-on Reset D010 (3) Supply Current D010C D010A D020 (5) Power-down Current ...
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... This spec. applies when GP3/MCLR is configured as an input with pull-up disabled. The leakage current of the MCLR circuit is higher than the standard I/O logic. 1999 Microchip Technology Inc. PIC12C671/672 (Commercial, Industrial, Extended) PIC12CE673/674 (Commercial, Industrial, Extended) Standard Operating Conditions (unless otherwise specified) Operating temperature 0° ...
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... C 2 — — 15 OSC C — — +70°C (commercial) +85°C (industrial) +125°C (extended) Units Conditions -3.0 mA 4.5V – + -2.5 mA 4.5V – +125 1.3 mA 4.5V – + 1.0 mA 4.5V – +125 and LP modes when external clock is used to drive OSC1. pF 1999 Microchip Technology Inc. ...
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... This spec. applies when GP3/MCLR is configured as an input with pull-up disabled. The leakage current of the MCLR circuit is higher than the standard I/O logic. 1999 Microchip Technology Inc. PIC12LC671/672 (Commercial, Industrial) PIC12LCE673/674 (Commercial, Industrial) Standard Operating Conditions (unless otherwise specified) Operating temperature 0° ...
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... 0.7 — — — — 15 OSC C — — +70°C (commercial) +85°C (industrial) Units Conditions -3.0 mA 4.5V – + -2.5 mA 4.5V – +125 TBD 4.5V – + TBD 4.5V – +125 and LP modes when external clock is used to drive OSC1. pF 1999 Microchip Technology Inc. ...
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... Bus free specifications only Hold ST DAT DATA input hold STA START condition FIGURE 12-4: LOAD CONDITIONS Load condition 1 Pin R = 464 for all pins except OSC2 for OSC2 output 1999 Microchip Technology Inc specifications only specifications only) T Time osc OSC1 SCK T0CKI t1 T1CKI ...
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... HS osc mode (PIC12CE67X-04 osc mode (PIC12CE67X-10 osc mode ns EXTRC osc mode ns XT osc mode ns HS osc mode (PIC12CE67X-04 osc mode (PIC12CE67X-10 osc mode 4/F CY OSC ns XT oscillator s LP oscillator ns HS oscillator ns XT oscillator ns LP oscillator ns HS oscillator 1999 Microchip Technology Inc. ...
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... Internal Calibrated RC * These parameters are characterized but not tested. Note 1: Data in the Typical (“Typ”) column unless otherwise stated. These parameters are for design guidance only and are not tested. 1999 Microchip Technology Inc. PIC12CE674, PIC12LC671, PIC12LC672, PIC12LCE673, PIC12LCE674 +70 C (commercial), A – ...
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... Units Conditions 75 200 ns Note 1 75 200 ns Note 1 35 100 ns Note 1 35 100 ns Note 1 — 0. Note 1 CY — — ns Note 1 — — ns Note 1 50 150 ns — — ns — — ns — — — — — — ns — — OSC 1999 Microchip Technology Inc. ...
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... I/O Hi-impedance from MCLR Low or Watchdog Timer Reset * These parameters are characterized but not tested. † Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. 1999 Microchip Technology Inc. PIC12C67X Min Typ† ...
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... Must also meet parameter 42 — ns — ns Must also meet parameter 42 — ns — ns — prescale value (2, 4,..., 256) 7Tos — c Max Units 63K 63K 63K 63K 20K 23K 25K 28K 417K 532K 532K 593K 360K 437K 448K 500K 1999 Microchip Technology Inc. ...
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... TABLE 12-7: A/D CONVERTER CHARACTERISTICS: PIC12C671/672-04/PIC12CE673/674-04 (COMMERCIAL, INDUSTRIAL, EXTENDED) PIC12C671/672-10/PIC12CE673/674-10 (COMMERCIAL, INDUSTRIAL, EXTENDED) PIC12LC671/672-04/PIC12LCE673/674-04 (COMMERCIAL, INDUSTRIAL) Param Sym Characteristic No. A01 N Resolution R A02 E Total absolute error ABS A03 E Integral linearity error IL A04 E Differential linearity error DL A05 E Full scale error FS A06 E Offset error ...
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... LSb (i.e., 20 5.12V) from the last sampled voltage (as stated HOLD — — If the A/D clock source is selected as RC, a time added before the A/D CY clock starts. This allows the SLEEP instruction to be exe- cuted. — 1999 Microchip Technology Inc. ...
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... This eliminates the need for a TI specification for standard operation. 4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific applica- tion, please consult the Total Endurance Model which can be obtained on Microchip’s website. 1999 Microchip Technology Inc. T +70 C, Vcc = 3.0V to 5.5V (commercial) A – ...
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... PIC12C67X NOTES: DS30561B-page 108 1999 Microchip Technology Inc. ...
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... DC AND AC CHARACTERISTICS - PIC12C671/PIC12C672/PIC12LC671/ PIC12LC672/PIC12CE673/PIC12CE674/PIC12LCE673/PIC12LCE674 The graphs and tables provided in this section are for design guidance and are not tested. In some graphs or tables the data presented are outside specified operating range (i.e., outside specified V and devices will operate properly only within the specified range. ...
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... MHz 400 µA 32 kHz 15 µA FIGURE 13- Min +125 Typ + Typ +25 C -10 .5 MIn –40 C 5.5 6 5.5V DD 900 µA* 900 µA 900 µA 60 µ Min +85 C Max -40 C .75 1.0 1.25 1.5 1.75 2.0 2.25 2.5 V (Volts) OH 1999 Microchip Technology Inc. ...
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... Min +85 C Typ +25 C -15 Max -40 C -20 -25 1.5 2.0 2.5 3.0 V (Volts) OH FIGURE 13- -10 -15 -20 -25 -30 -35 -40 3.5 4.0 4.5 V (Volts) OH 1999 Microchip Technology Inc. FIGURE 13- 3 FIGURE 13- 5.0 5 PIC12C67X vs 2 Max -40 C Typ +25 C Min +85 C Min +125 C ...
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... OL DS30561B-page 112 FIGURE 13-10: V 1.8 Max -40 C 1.6 1.4 1.2 Typ +25 C 1.0 0.8 0.6 Min + 2.5 Min +125 C 1.0 (INPUT THRESHOLD TH VOLTAGE) OF GPIO PINS vs Max (-40 to 125) Typ (25 Min (-40 to 125) 3.5 4.5 5.5 V (Volts) DD 1999 Microchip Technology Inc. ...
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... FIGURE 13-11 NMCLR AND T0CKI vs 3.5 3.0 2.5 2.0 1.5 1.0 0.5 2.5 3.5 4.5 V (Volts) DD 1999 Microchip Technology Inc Max (-40 to 125 Typ ( Min (-40 to 125 Max (-40 to 125 Typ ( Min (-40 to 125) IL 5.5 PIC12C67X DS30561B-page 113 ...
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... PIC12C67X NOTES: DS30561B-page 114 1999 Microchip Technology Inc. ...
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... Standard OTP marking consists of Microchip part number, year code, week code, facility code, mask rev#, and assembly code. For OTP marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price. 1999 Microchip Technology Inc. PIC12C67X Example ...
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... MILLIMETERS NOM MAX 8 2.54 3.56 3.94 4.32 2.92 3.30 3.68 0.38 7.62 7.94 8.26 6.10 6.35 6.60 9.14 9.46 9.78 3.18 3.30 3.43 0.20 0.29 0.38 1.14 1.46 1.78 0.36 0.46 0.56 7.87 9.40 10. 1999 Microchip Technology Inc. ...
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... Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom *Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. Drawing No. C04-056 1999 Microchip Technology Inc Units INCHES* ...
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... Microchip Technology Inc. ...
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... Redefine data variables to reallocate them. 4. Verify all writes to STATUS, OPTION, and FSR registers since these have changed. 5. Change reset vector to 0000h. 1999 Microchip Technology Inc. PIC12C67X APPENDIX B: CODE FOR ACCESSING EEPROM DATA MEMORY Please refer to our web site at www.microchip.com for code availability. ...
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... PIC12C67X NOTES: DS30561B-page 120 1999 Microchip Technology Inc. ...
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... Indirect Addressing..................................................... 23 Code Protection ............................................................ 53, 67 COMF Instruction................................................................ 75 Computed GOTO................................................................ 22 Configuration Bits ............................................................... and AC Characteristics............................................... 109 DC bit.................................................................................. 15 DC Characteristics PIC12C671/672, PIC12CE673/674 ............................ 92 PIC12LC671/672, PIC12LCE673/674 ........................ 94 DECF Instruction ................................................................ 75 DECFSZ Instruction............................................................ 75 Development Support ..................................................... 3, 83 Digit Carry bit ........................................................................ 7 Direct Addressing ............................................................... 23 E EEPROM Peripheral Operation .......................................... 33 Electrical Characteristics - PIC12C67X .............................. 89 Errata .................................................................................... 2 External Brown-out Protection Circuit ...
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... Plus Entry Level Development System ......... 85 PIE1 Register...................................................................... 18 Pinout Description - PIC12CE67X ........................................ 9 PIR1 Register ..................................................................... 19 POP .................................................................................... 22 POR .................................................................................... 58 Oscillator Start-up Timer (OST) ............................ 53, 58 Power Control Register (PCON)................................. 58 Power-on Reset (POR)................................... 53, 58, 59 Power-up Timer (PWRT) ...................................... 53, 58 Power-Up-Timer (PWRT) ........................................... 58 Time-out Sequence .................................................... 58 Time-out Sequence on Power-up ............................... 60 TO............................................................................... 56 Power.................................................................................. 56 1999 Microchip Technology Inc. ...
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... Special Features of the CPU .............................................. 53 Special Function Register PIC12C67X ................................................................. 13 Special Function Registers ................................................. 70 Special Function Registers, Section ................................... 12 Stack ................................................................................... 22 Overflows .................................................................... 22 Underflow.................................................................... 22 STATUS Register ............................................................... 15 SUBLW Instruction.............................................................. 80 SUBWF Instruction ............................................................. 80 SWAPF Instruction.............................................................. 81 1999 Microchip Technology Inc. PIC12C67X T T0CS bit.............................................................................. 16 T ..................................................................................... 49 AD Timer0 RTCC.......................................................................... 59 Timers Timer0 Block Diagram .................................................... 39 External Clock ...
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... PIC12C67X NOTES: DS30561B-page 124 1999 Microchip Technology Inc. ...
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... Trademarks: The Microchip name, logo, PIC, PICmicro, PICSTART, PICMASTER, PRO MATE and MPLAB are registered trademarks of Microchip Technology Incorpo- rated in the U.S.A. and other countries. Flex ROM and fuzzy LAB are trademarks and SQTP is a service mark of Microchip in the U ...
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... Is there any incorrect or misleading information (what and where)? 7. How would you improve this document? 8. How would you improve our software, systems, and silicon products? DS30561B-page 126 Total Pages Sent FAX: (______) _________ - _________ N Literature Number: DS30561B 1999 Microchip Technology Inc. ...
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... PIC12LCE674 PIC12C671 PIC12C672 PIC12C671T (Tape & reel for SOIC only) PIC12C672T (Tape & reel for SOIC only) PIC12LC671 PIC12LC672 PIC12LC671T (Tape & reel for SOIC only) PIC12LC672T (Tape & reel for SOIC only) PIC12C67X Examples a) PIC12CE673-04/P Commercial Temp., PDIP Package, 4 MHz, ...
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... Serialized Quick Turn Programming (SQTP service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2002, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received QS-9000 quality system ...
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... Korea Microchip Technology Korea 168-1, Youngbo Bldg. 3 Floor Samsung-Dong, Kangnam-Ku Seoul, Korea 135-882 Tel: 82-2-554-7200 Fax: 82-2-558-5934 Singapore Microchip Technology Singapore Pte Ltd. 200 Middle Road #07-02 Prime Centre Singapore, 188980 Tel: 65-334-8870 Fax: 65-334-8850 Taiwan Microchip Technology Taiwan 11F-3, No. 207 ...