PIC16F887-E/P Microchip Technology, PIC16F887-E/P Datasheet - Page 6

• Manufacturer Part Number: PIC16F887-E/P
• Description: IC PIC MCU FLASH 8KX14 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F887-E/P

• Core Size: 8-Bit
• Program Memory Size: 14KB (8K x 14)
• Mfg Application Notes: Intro to Capacitive Sensing Appl Notes Layout and Physical Design Appl Note
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 368 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Controller Family/series: PIC16F
• No. Of I/o's: 35
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 368Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Package: 40PDIP
• Device Core: PIC
• Family Name: PIC16
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 35
• Interface Type: I2C/SPI/USART
• On-chip Adc: 14-chx10-bit
• Number Of Timers: 3
• Processor Series: PIC16F
• Core: PIC
• Data Ram Size: 368 B
• Maximum Clock Frequency: 20 MHz
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 53273-916
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM164123, DM164120-3, DV164122
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LD
• Lead Free Status / Rohs Status: Details

PIC16F88X
5. Module: MSSP (I
DS80302F-page 6
When the master device wants to terminate
receiving any more data from the slave device, it
will do so by sending a NACK in response to the
last data byte received from the slave. When the
slave receives the NACK, the R/W bit of the
SSPSTAT register remains set improperly.
Work around
Use the CKP bit of the SSPCON register to
determine when the master has responded with a
NACK. The CKP bit will be clear when the
response is an ACK, and set when the response is
a NACK. The CKP bit is automatically cleared to
stretch the clock when the master responds to
received data with an ACK. This gives the slave
time to load the SSPBUF register before setting
the CKP bit to release the clock stretching. When
the master responds to received data with a NACK
the CKP bit properly remains set, and there is no
clock stretching.
Affected Silicon Revisions
PIC16F882
PIC16F883/PIC16F884
PIC16F886/PIC16F887
A0
A0
A2
X
X
X
2
C™ Slave Mode)
© 2009 Microchip Technology Inc.